Turn off pll before entering sleep - STM32F410RB

[Bogdan]

Hello,

i am using stm32f410rb device, where i want to do some things at 100mhz using HSI only, and pll.

After this i am puting the device in sleep mode, and  provide wakeup using the rtc interupt.

The HSE is not used.

 

My problem is that before sending the sleep functions,  the pll and the system clock source  remains still on the PLL.

If i remember corectly i cannot change pll setings while this is running..

 

Here is my code

 

 

int main(void)
{
 clockConfig();
 RCC_ClocksTypeDef clocks;
 RCC_GetClocksFreq(&clocks);

 RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
 PWR_BackupAccessCmd(ENABLE);
 RCC_BackupResetCmd(ENABLE);
 RCC_BackupResetCmd(DISABLE);

 /* Check that the system was resumed from StandBy mode */
 if(PWR_GetFlagStatus(PWR_FLAG_SB) != RESET)
 {
 /* Clear SB Flag */
 PWR_ClearFlag(PWR_FLAG_SB);
 
 }

 sprintf(sout,"%d",clocks.HCLK_Frequency);
 USART_puts(USART1,sout);

 configure_rtc(); // configure rtc to generate interupt every 20 sec

 while(1)
 {

 if(stbyFlag==0)
 {
 stbyFlag=1;
	 clockConfig(); // configure back the clock to HSI + PLL
	 RCC_GetClocksFreq(&clocks);
 sprintf(sout,"HCLK after wakeup %d\r\n SysClk source %d 
 \r\n",clocks.HCLK_Frequency,RCC_GetSYSCLKSource());
	 USART_puts(USART1,sout);
 }

 //#################### Do things here before sleep #####################


 //######################################################################
 
 //########## Config clocks and turn off PLL before entering sleep
 RCC_HSEConfig(RCC_HSE_OFF);
	RCC_HSICmd(DISABLE);
	//Disable the PLL
	RCC_PLLCmd(DISABLE);
	RCC_HSICmd(ENABLE);
	//check and wait for HSI to be stable
	while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET)
	{

	}
	RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI);

	SystemCoreClockUpdate();

 //####### end of config clks before sleep #######

 for(uint32_t g=0;g<0xFFFF;g++); // add some delay
 RCC_GetClocksFreq(&clocks);
 sprintf(sout,"HCLK after sleep %d\r\n",clocks.HCLK_Frequency);

 //########### Enter in stop mode
 PWR_FlashPowerDownCmd(ENABLE); //set FPDS bit
 PWR_EnterSTOPMode(PWR_Regulator_LowPower, PWR_STOPEntry_WFI);
		
 }
return 0;
}



void RTC_WKUP_IRQHandler(void)
{
 if(RTC_GetITStatus(RTC_IT_WUT) != RESET)
 {
 GPIO_ToggleBits(GPIOA,GPIO_Pin_5);
 GPIO_ToggleBits(GPIOC,GPIO_Pin_3);
 RTC_ClearITPendingBit(RTC_IT_WUT);
 stbyFlag=0;
 EXTI_ClearITPendingBit(EXTI_Line22);

 }
}

 

 

 

After coming from sleep interupt i set the stbyflag to reconfigure back to HSI & PLL for SystemClock,

Then i do the tasks... and try to turn off the PLL before entering sleep again.

My problem is that i cannot turn off the PLL and the SysClock source is remaining set on the PLL output. 

Before sleep i want the sysclock to be sourced only from the HSI output.

What do you think?

 

 

 

 

[Danish1]

The Reference Manual for your stm32 should make it clear that you cannot change the pll settings (including turning it off) while the pll is the clock source.

The process has to be done in separate steps:

• Get the new clock running (HSI is in your case). You do need to wait until the system confirms it is running with HSIRDY in RCC CR.
• Select the new clock in RCC CFGR sw bits
• Wait until the system confirms that the new clock is being used in RCC CFGR sws bits
• Only then can you turn off / alter the old clock - the PLL in your case.

[MM..1]

Instead sleep use STOP mode this stop PLL for you by design.

[Bogdan]

Hello,

thank you all for your sugestions,  i managed to work with what i have,    i dont need to worry about PLL while in sleep.

And also if i need a lower speed after wake-up,  the PLL will automaticaly be disabled and HSI set as SystemClock source  like its stated for RCC_CFGR  bits 1:0.

 

I managed to get 13uA in sleep, and 13mA @84MHZ with HSI + PLL