Understanding Power Consumption using SMPS on STM32N6

[Panda]

I am unsure if I correctly understand the power consumption of the N6 Family.

 

I want to supply the MCU with 1,8V and use the internal SMPS to supply Core with 0,81V.

When it comes to designing the 1,8V voltage source, how much current do I have to expect?

 

Datasheet chapter 5.3.6 details supply current characteristics

- I see that I_DD is almost negligable in the grand scheme (less than 1 mA)

- CORE supplied by SMPS is given as current I_DDA1V8, order of magnitude around 100mA typ

- I_DDA1V8 in and of itself also quite small with around 5 mA

- I_DDA1V8AON itself also around 5 mA

- Table 39. shows current consumption of SMPS, the given current is also I_DDA1V8AON with values up to 100 mA typ.

 

Since some currents are defined multiple times in different tables I am having trouble to understand which values to take for a maximum current calculation.

Do I have to add all together?

Also, CORE supply without SMPS through I_DDCORE needs less current than when supplied with SMPS through I_DDA1V8 (most of the scenarios at least). I am having trouble to understand how that makes sense, since V_CORE is less than half of 1.8V. I would expect the SMPS to draw less current.

 

I guess there is one detail or understanding that I am missing.

I just finished reading AN5967 but that didn't help.

 

Please advise me on how to deduce maximum current consumption when using SMPS.

 

 

Thanks

Lucas

[RomainR.]

Hello @Panda 

In DS14791 Rev 4, here are the different Power consumption table in Run Mode condition and in Internal SMPS configuration you have to consider:

Table 32. Current consumption in Run mode
Is IDD current consumption in VDD supply when VDD=1.8V

Table 34. Current consumption (core) in Run mode

Is IDDCORE current consumption in VDDCore supply when VDD=1.8V

• In VOS low VDDCORE = 0.81V
• In VOS high VDDCore = 0.9V

Table 36. Current consumption (1V8) in Run mode

Is IDDA1V8 current consumption in VDDA1V8 supply when VDD=1.8V

• VDDA1V8 = 1.8V

Table 38. Current consumption (Always ON) in Run mode

Is IDDA18AON current consumption in VDDA18AON supply when VDD=1.8V

• VDDA18AON = 1.8V

Table 39. Current consumption (SMPS) in Run mode

Is IDDSMPS current consumption in VDDSMPS supply when VDD=1.8V

• VDDSMPS = 1.8V

You also wrote:

"Also, CORE supply without SMPS through I_DDCORE needs less current than when supplied with SMPS through I_DDA1V8 (most of the scenarios at least). I am having trouble to understand how that makes sense, since V_CORE is less than half of 1.8V. I would expect the SMPS to draw less current."

If I compare IDDCore between Table 33 (external SMPS) and Table 34 (internal SMPS) the typical values are lower in internal SMPS than external, but are greater at Tj=125°C in internal SMPS.

Let me know if it clarify your question ?

Best regards,

Romain,

 

 

[Panda]

Hello Romain,

 

first I want to say thank you for getting back to me so quickly.

I used REV3 of the document. I can see that in REV4 the values in Table 34 are indeed lower than Table 33.

 

It seems that REV4 there have been some changes to the power consumption part of the datasheet.

Now it makes more sense and the double definitions are gone, which clears a lot of stuff up.

 

However, in 5.1.7, figure 16, there still is no IDDSMPS, so I am wondering where the current specified in table 39 is drawn from.

 

The main question that stays for me is, do I have to consider IDDCORE  AND  IDDSMPS separately (as in, add them together)?
I was of the impression that IDDCORE is supplied by the SMPS.

 

 

[RomainR.]

Hello @Panda 

The figure 16 is a functional view to explain how supply are grouped. And I think it represents external SMPS configuration only. That's why VDDSMPS is not represented.

 

"The main question that stays for me is, do I have to consider IDDCORE  AND  IDDSMPS separately (as in, add them together)?
I was of the impression that IDDCORE is supplied by the SMPS."

In internal SMPS, IDDSMPS therefore depends on the IDDCore including the internal SMPS efficiency, the voltage ratio (VDDSMPS/VDDCore), and the different external losses (leakage or dissipation). If you need to size the external regulator of the VDDSMPS, you should consider IDDSMPS which corresponds to the VDDCore condition of table 34.

Let me know if it help?

Best regards,

Romain,

 

[Panda]

Hello Romain,

 

I think I understand it now.

If you have contact to responsible engineers, I would put this as a suggestion: add a few sentences about this topic in the datasheet, otherwise it's quite confusing. And figure 16 should still have a representation of IDDSMPS (imho). Especially if figure 16 represents the configuration using the SMPS, it needs to be clear, where IDDSMPS is drawn from. Because its not in all of the depicted currents (IDDiox for example should have nothing to do with it)

 

Anyways,

as I will use the SMPS, I will consider IDDSMPS as given in table 39

 

Thank you!

[RomainR.]

Yes, we will provide additional clarification on figure 16 in the next version of the datasheet.

Thank you in advance for marking my response as accepted if it helped you.

Best regards,

Romain,