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Graduate II
December 8, 2023
Solved

Use ADC with DMA, then DMA to SDIO/MMC?

  • December 8, 2023
  • 2 replies
  • 1364 views

Hi all,

I am using a STM32H723ZG Nucleo-144 board. Here I have attached a micro-SD card module. I am sampling from one of the ADCs with 8.33 Msps at 8-bit resolution. I am able to transfer the data to RAM using DMA without any loss. However, I wonder if it is possible to use another DMA to transfer the data directly to the SD card without any or minimal CPU intervention due to this high speed, and to avoid loss? I assume I would need to use a filesystem such as FatFS. 

Can DMA or MDMA etc. support filesystems with SPI or SDIO/MMC?

All replies are appreciated!

    This topic has been closed for replies.
    Best answer by Tesla DeLorean

    The implementation detail is hidden in the FATFS/DISKIO layer, you just need to be able to read/write multiple blocks efficiently and correctly.

    For speed your work at the f_read() / f_write() layer should be done on sector/boundaries and multiples. Doing small unaligned operations will be significantly slowed. So manage your buffering efficiently.

    If you can do operations at 32KB performance will be reasonably optimal. This is still likely to be smaller than the erase block size, but about the practical limit for using RAM, and card/cluster interaction.

    Writing at 8 MBps is going to depend on cards/mmc device. Would look at efficient 8-bit eMMC chips

    2 replies

    Super User
    December 8, 2023

    It is possible to use DMA to do reads/writes from the SD card. Note that FatFS requires some amount of CPU overhead to interpret FatFS, if that is what you want. DMA is just a straight data transfer, it doesn't know anything about file systems.

    Graduate II
    December 9, 2023

    The implementation detail is hidden in the FATFS/DISKIO layer, you just need to be able to read/write multiple blocks efficiently and correctly.

    For speed your work at the f_read() / f_write() layer should be done on sector/boundaries and multiples. Doing small unaligned operations will be significantly slowed. So manage your buffering efficiently.

    If you can do operations at 32KB performance will be reasonably optimal. This is still likely to be smaller than the erase block size, but about the practical limit for using RAM, and card/cluster interaction.

    Writing at 8 MBps is going to depend on cards/mmc device. Would look at efficient 8-bit eMMC chips