Use Ethernet on nucleo STM32F767zi without RTOS
Objective:
Use ethernet cable to talk to MCU.
Don't want RTOS, just want to use simple CAT5e cable to link to PC server and can ping and can send some messages to and from server via JSON format messages.
I have swept through nearly all available thread from buggy ETH matters collected by Piranha (since ~2019) to 2022 by Adam (https://community.st.com/t5/stm32-mcus/how-to-create-a-project-for-stm32h7-with-ethernet-and-lwip-stack/ta-p/49308#fn:2)
I've tried to follow, but failed, not every thing is true on F767zi.
Some experts suggested that ST should automate the IDE in MCU specific settings. Agree.
Because all the references to make it works is not well combed for beginner. It is very messy compared to other suppliers.
For example, set memory address here and there, enable this disable that... I dont know why, not much explanation, very little cited documents, but somehow the Guru Experts knew it. Amazing. I followed, but no luck.
I cannot even ping the nucleo MCU from PC. I saw some who could...
https://community.st.com/t5/stm32-mcus-embedded-software/stm32f767zi-lwip-freertos-no-ping-response-can-not-compile-lwip/td-p/171121/page/2
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Now it is late mid of 2024.
I still cannot get a new references to make ETH work. AI's example also not working. The official bugs are too powerful, like many community mates have commented. hahahaha
Question:
Has anyone know how to get on-board ETH works on nucleo-F767zi?
Or is this F7 onboard ETH really buggy, should I just shift to H7 series better?
Or just forget about onboard ETH, better get an external ETH module to interface directly?
Here is some of my setting
A:Connectivity TAB
1. ETH enabled, LWIP driver DP83848 selected (only this is available. Some used another LANXXXX driver, never seen in my IDE)

2. corrected ETH TXD1 after referring to Nucleo's user guide pdf, it was previously automatically set to another pin. What a *** bug...

3. NVIC global interrupt Ticked. (many example use it, so I followed)
B: LWIP setting:
1. Set IP. The rest Default.

2. Key Option: I followed Adam's setting. I don't understand these here, I just followed Adam (URL above).


Many experts shared to set LwIP heap Pointer address. F767zi does not have that setting available even "show advance parameter" is checked. So I didn't set as shown by Adam's post.
C: Cortex M7 setting


I don't know why these is needed, just follow and adjust linearly from Adam post.
D:Clock to 400MHz
Adam set the SysClk to 400.
I cannot get it to 400 in F767zi, it is RED in the maximum available divider and multiplier.
I tried to maximize it to 200. I wonder if this is critical.

E: Main.c
In the main.c, I saw a few new lines added by system:
MX_LWIP_Init(); // system added
inside while(1), first line, I added
MX_LWIP_Process(); // many ppl who ping MCU successfully, use this function in the while loop, so I followed.
But I cannot get a successful ping. I got these:
------------
Pinging 192.168.1.111 with 32 bytes of data:
Reply from 192.168.1.89: Destination host unreachable.
Reply from 192.168.1.89: Destination host unreachable.
Reply from 192.168.1.89: Destination host unreachable.
Reply from 192.168.1.89: Destination host unreachable.
Ping statistics for 192.168.1.111:
Packets: Sent = 4, Received = 4, Lost = 0 (0% loss),
------------
Lastly, I did not do the Modification in
- Placement of the RX_POOL buffers (although we configured the address in CubeMX) in ethernetif.c2:
- and Modification in Linkerscript
because it looks exotic to me, I am not sure how and where and why.
Please correct me if you really know where goes wrong and reason behinds.
If there is new references available in 2024, please share with me.
If you know better chipset, external ETH module that is easier to use, do share with me please.
