Using classical CAN with FDCAN controller on STM32H743VIT6
Hello. I have three question about using classical CAN frame with FDCAN controller.
I am using STM32H743VIT6 MCU on my PCB.
1. If system clock(label in ioc file: SYSCLK) is too low, can it make impossible to use CANbus?
2. If I using only classical CAN frame, does Nominal bit timing parameter(Nominal Sync Jump Width, Nominal Prescaler, Nominal Time Seg1/2) only consider and Data bit timing parameter ignored? or both bit timing parameter use for CAN 2.0 communication?
2.1 I am using KVASER Bit Timing Calculator to set timing parameter. what is appropriate sample point value for STM32H743?
2.2 There is Tseg1, Tseg2, SJW at KVASER Bit Timing Calculator for CAN FD. Does Tseg1 = Time Seg1, Tseg2 = Time Seg2 and SJW = Sync Jump Width?
3. If I using only classical CAN, may I use CAN transceiver which is not supporting FDCAN?
(I already make PCB and I use CAN transceiver which didn't supporting FDCAN...)
Thank you.

