VDD33USB on STM32H743

[Singh.Harjit]

The datasheet says that power must be supplied on this pin if USB is to be used. It must also be the last power supply to be energized and the first to be removed.

If my design does *not* use USB. Can I tie this pin to VSS and call it a day?

I want to minimize my power consumption.

From the datasheet: DS12110 Rev 5, Table 23:

Thank you.

[Khouloud GARSI]

Hi @Singh.Harjit​ ,

I recommend to connect the VDD33USB pin to VDD. If you will not use USB (USB PHYs deactivated + related USB GPIOs (DM & DP) not used), this will not impact your power consumption.

Khouloud.

[stephane.mouton]

What if the VDD voltage is 1.8V ?

Connecting VDD33_USB to GND seems adequate according to the electrical specifications of the datasheet...

Thanks in advance for your answer

Stephane

[Khouloud GARSI]

Hi Stephane,

It's recommended to connect the VDD33_USB to VDD even if your MCU is turning on 1.8V (USB peripheral will not be used).

The same voltage should be applied to VDD50_USB, in case the pin is available on the package you're using.

Khouloud.

[BNord.1]

Hello ST Team,

I'm planning to use the USB communication with a STM32H743ZI. Then, I will have to use an external power supply, since it doesn't have VDD50USB input.

This MCU will be powered with a 3.3Vcc. power supply.

However, I read in the AN4938 (Getting started with STM32H74xI/G and STM32H75xI/G hardware development) the following statement:

"During the power-on and power-down phases (VDD < VDD minimum value),VDD33USB should always be lower than VDD".

If I connect directly the VDD33USB to the VDD, I won't be compliant with this recommendation. What would be the consequences during the power on/off? Is there a risk that the USB communication fails?

In any case, would there be a power management IC that would you suggest to use if I wanted to be compliant with this recommendation?

Thanks a lot for your help.

[Bridger]

USB收发器独立电源供应有以下几种方式，具体取决于VDD33USB和VDD50USB的可用性： 1. 当VDD50USB引脚可用时，可以使用该引脚为USB收发器提供内部稳压器的电源。在这种情况下，VDD50USB引脚应接收4.0至5.5 V之间的电压，通常来自USB连接器的VBUS线。经稳压后的电源（3.0至3.6 V）将在VDD33USB上提供。在这种配置中，VDD50USB电压必须满足以下条件：必须连接一个外部电容器到VDD33USB。注意：请参考产品数据手册了解VDD条件。 2. 当VDD33USB引脚可用时，可以使用该引脚为内部收发器供电。在这种情况下，VDD33USB引脚应接收3.0至3.6 V之间的电压。如果VDD50USB也可用，则必须将其连接到VDD33USB。例如，当设备以1.8 V供电时，可以将独立的3.3 V电源应用于VDD33USB。当VDD33USB连接到单独的电源时，它与VDD和VDDA无关。它必须是最后应用的电源，并且是第一个关闭的电源。必须遵守以下条件（参见图2）： - 在上电和下电阶段（VDD < VDD最小值），VDD33USB应始终低于VDD。 - 必须遵守VDD33USB上升和下降时间规格（请参阅设备数据手册中提供的表格）。 - 在工作模式下，VDD33USB可以比VDD低或高： - 如果使用USB接口（USB OTG_HS/OTG_FS），则由VDD33USB供电的GPIOs在VDD33USB_MIN和VDD33USB_MAX之间运行（参见图2）。 - VDD33USB为USB OTG_HS和USB OTG_FS收发器提供电源。如果在应用程序中仅使用一个USB收发器，则仍由VDD33USB为另一个收发器的GPIOs供电。 - 如果不使用USB接口（USB OTG_HS/OTG_FS），则由VDD33USB供电的GPIOs在VDD范围内运行（介于VDD_MIN和VDD_MAX之间）。 在上述两种配置中，都必须在VDD33USB上连接一个外部电容器。 3. 当既没有VDD33USB也没有VDD50USB可用时，将使用VDD引脚为USB收发器供电，必须在3.0至3.6 V范围内才能使收发器正确工作。