What is the actual STM32 pin capacitance (for the purpose of sizing an HSE crystal)?

[NAbun.1]

Hello,

I originally tagged onto this thread: https://community.st.com/t5/stm32-mcus-products/stm32f103-hse-crystal-capacitors/td-p/771200 but I was recommended to make a separate thread.

 

Many of the STM32 datasheets, such as the STM32H753, say that the pin capacitance is 5pF per pin. When trying to size a crystal for the HSE oscillator, the designer is told to follow AN2867. When trying to calculate the stray capacitance we (at a minimum) add the pin capacitance of the two oscillator pins to get 10pF. The STM32H753 datasheet even says to approximate 10pF here on page 232:

AN2867 does not recommend any crystals for the STM32 HSE oscillator, so the assumption is that crystal has to have higher than 10pF load capacitance for STM32 devices. 

I understand that pin capacitance would vary per package. Does ST have a more accurate estimation of pin capacitance? Or does ST have recommendations for crystals for the STM32 HSE oscillator?

Thanks,

Nino

[jiangfan]

Yes, pin capacitance will vary per package, QFP has higher pin capacitance than BGA.

from experience, I agree that "pin capacitance should be in range of 2pF to 3pF in general, in our datasheet we are providing worst case typical condition of 5pF ( generic to all I/Os)" of post:

Crystals and load capacitors for stm32l432 - STMicroelectronics Community

 

although no recommendation from ST for crystals regarding the STM32 HSE oscillator, you may try to use same HSE crystal of official STM32 board.

[NAbun.1]

Hi @jiangfan ,

Thank you for your response. In the post you linked, they are discussing a UFQFPN32 (5x5) package, which I imagine is one of the lower pin capacitance parts.

Does the 2pF to 3pF apply to the STM32H753 LQFP100 (14 x 14 mm) package, or is that more likely to see the worst case, ad we should plan for the full 5pF?

 

Thanks,

Nino

[jiangfan]

I would like to assume ~2pF for BGA/QFN, and assume ~3pF for QFP.

[STOne-32]

Dear @NAbun.1 ,

I confirm what has been communicated by @jiangfan ( our boards expert here ) :) You can assume that HSE In/out pins are in range of 2 to 3pF on your selected LQFP100 package as worst case . In fact, it is very easy to obtain it with empirical testing on your PCB. Let’s called  “Cs” which is the Sum of pads and PCB parasitic capacitance .

if you choose a crystal of 8pF CL ( crystal datasheets ) , You can start by putting on the two legs CL1 and CL2  two capacitors of  10pF - which is { 8-3}  * 2 , then output the HSE frequency  and monitor the nominal frequency using a good oscilloscope or universal counter. The right value of CL1/CL2 you can adjust is when the MCO output is the closed to the Nominal Frequency of the crystal ( written in Datasheet +/- XXPPM) then you can adjust and deduce the exact Cs of your PCB including internal pads . Try it and let us know with scopes .

if the frequency is a bit higher than nominal , you need to add extra capacitance on CL1/CL2, if it slower you need to remove and reduce 10pF to smaller value .

 

Hope it helps you,

STOne-32

[NAbun.1]

Hello @jiangfan & @STOne-32 

 

Thank you very much for your helpful replies. I apologize for my late response as I was on vacation. I have one last follow up.

I just want to clarify if the capacitance is 2-3pF per pin or 2-3pF of total stray capacitance? @STOne-32 seemed to use 3pF as the total stray capacitance in his equation, but I would think it would be (8pF - 3pF * 2) * 2 = 4pF given the two pins, but perhaps I am misunderstanding?

 

-Nino 

[STOne-32]

Dear @NAbun.1 ,

I would assume that you can start by having  Cs ( Total Cpin  and Cpcb) = 3pF .  but in the formula it will be this one

if Crystal CL=8pF ( as you purchased in datasheet of the crystal).    (CL-Cs)*2 = CL1=CL2.

(8pF-3pF)* 2 =  10pF and not 4pF for each CL1/CL2 cap leg to add.      Cs is subtracted only once and is the equivalent parallel capacitance seen by the Oscillator /crystal.

Hope it helps you.

 

Ciao

STOne-32. 

[NAbun.1]

Hi @STOne-32, thank you. I'll probably start with 3pF for Cpin, but might add a tiny bit more for Cpcb depending on the copper thickness or stackup. I will, of course, verify after build. I just wanted to make sure I didn't have to change the layout to accommodate a larger crystal, which it seems like I don't have to. =)

 

[mƎALLEm]

Hello,

A new article "How to select a compatible crystal and load capacitors for STM32 with layout guidelines" has been published today and this thread has been linked to that article in the "Related links" section.

Good reading.