What is the maximum frequency for the FDCAN module in STM32G4

[Oleksii]

Looking through the RM0440 and the datasheet on the STM32G4,
I can't find information on the maximum recommended frequency for modul
CANFD.
Or it may be the same as for microcontroller up to 170 MHz?

HSE 8mhz -> PllM /2 -> PLLx85 /R /2 ... APB1 /1 -> PCLK1 170

                                  or                /Q /2 - > 170 

 

 

There are also some strange things))
Or maybe I don't understand yet.

After startup, the registers are set to default values.
For different frequencies.

 

44.4.3FDCAN data bit timing and prescaler register (FDCAN_DBTP)
Address offset: 0x000C
Reset value: 0x0000 0A33

..

Note:
With an FDCAN clock of 8 MHz, the reset value 0x0000 0A33 configures the FDCAN for a
fast bit rate of 500 kbit/s.
The data phase bit rate must be higher than or equal to the nominal bit rate

 

FDCAN nominal bit timing and prescaler register (FDCAN_NBTP)
Address offset: 0x001C
Reset value: 0x0600 0A03

Note:
With a CAN kernel clock of 48 MHz, the reset value of 0x0600 0A03 configures the FDCAN
for a bit rate of 3 Mbit/s.

 

[mƎALLEm]

Hello,

1- Yes the maximum FDCAN kernel clock is 170MHz (the maximum system clock).

2- Regarding the notes: these are just examples to show the bit time computation and are not the default FDCAN kernel clock frequencies after reset.

Data phase bit time:

  "With an FDCAN clock of 8 MHz, the reset value 0x0000 0A33 configures the FDCAN for a
fast bit rate of 500 kbit/s."

As the FDCAN_DBTP value after reset = 0x0000 0A33: DBRP = 0, DTSEG1=10 (0xA), DTSEG2=3

and the fdcan nominal bitrate = FDCAN kernel clock / (DBRP+1) x (DTSEG1 + DTSEG2 + 3).

-> fdcan data bitrate = 8MHz/ (0 + 1) x (10 + 3 + 3) = 8/16 = 500kb/s

Nominal phase bit time:

"With a CAN kernel clock of 48 MHz, the reset value of 0x0600 0A03 configures the FDCAN
for a bit rate of 3 Mbit/s."

Same thing for the nominal bit time:

As the FDCAN_NBTP value after reset = 0x0600 0A03: NBRP = 0, NTSEG1=10 (0xA), NTSEG2=3

and the fdcan nominal bitrate = FDCAN kernel clock / (NBRP+1) x (NTSEG1 + NTSEG2 + 3).

-> fdcan nominal bitrate = 48MHz/ (0 + 1) x (10 + 3 + 3) = 8/16 = 3Mb/s

But to me the example of Nominal bit time giving 3Mb/s needs to be changed as the nominal bit time should not exceed 1Mb/s or swap the two examples for nominal and data bit time computation. I will escalate it for the correction.

Hope that answered your question.

[Oleksii]

Thanks for the answer

It would be cool if in RM0440
In the CANFD section
A table has appeared with recommendations for the frequency of module.
And the values ​​for the registers FDCAN_NBTP ,
FDCAN_DBTP.
For standard speeds.
1000
800
500
250
125

From preliminary calculations, it turns out that the best clock frequency of the CANFD module is 80 MHz, which gives more options for values.
By the way, while I was looking for a convenient calculator for the STM32G4 series, I came across this page (maybe it will be useful to someone)

https://phryniszak.github.io/stm32g-fdcan/

[mƎALLEm]

The FDCAN section is common to many products so not possible to give an example for a specific product.

[Oleksii]

I'm talking about this document, it is the same for the entire G4 series.))
The CANFD module is the same for the entire series.