Why does LwIP need CPU DCache (on STM32H743)?
To enable LwIP in CubeMX (inside CubeIDE) it needs the CPU data cache enabled. Ok, no problems, but it doesn't explain why and I can't find why this is the case. Is anyone able to offer an explaination?
To enable LwIP in CubeMX (inside CubeIDE) it needs the CPU data cache enabled. Ok, no problems, but it doesn't explain why and I can't find why this is the case. Is anyone able to offer an explaination?
@musmuris The D-cache is required because the LwIP code uses "cache maintenance" operations (aka flush & discard). These may crash when the cache is not active - because of bug or "feature" in some low level stuff (CMSIS or whatever). Nucleo-H743ZI2 is a mature well known board, the ready examples should work. So, better start with these examples and *do not touch anything* for now, just let it work as is. If you want to edit the board config in CubeMX/IDE & re-generate the project: please suppress the urge until you get the ETH example working. (yes, these examples have some other issues but deal with them later).
If you absolutely have to disable the D cache: a. Skip the enable (rather than enable then disable), b. Remove/comment out the "cache maintenance" stuff.
Good luck.
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