STM32 MCUs Security

need to transfer some string to PC via USB config. Here am implementing simple code here. But no responses in hyper terminal. Kindly help me. Am using Nucleo-STM32H563ZI board.//=======================================while (1){/* USER CODE END WHILE *//* USER CODE BEGIN 3 */HAL_PCD_EP_Transmit(&hpcd_USB_DRD_FS, *data, data, 10);HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);HAL_Delay(1000);}/* USER CODE END 3 */

Hi @ChannelIm using  the TF-M Application package for the STM32U585 development board from ST. My query is as per the memory map of the Internal Flash has a combined storage of 826kb for secure and non secure image.(Please refer to the figure below). But my project requirement needs more space and hence need to store the primary slot and bootloader associated partition in the internal flash and needs the secondary slot storage to be implemented in the external flash(for backup purpose). How can this requirement be achieved without altering the PSA Certified TF-M Bootloader Implementation.(Please suggest if there is an alternate approach).My application size (secure +non secure) would consume nearly the 826 kb or less. Please suggest any detailed approach on how this requirement can be achieved.2. One more query is like which all crypto schemes have been implemented with the help of the PSA API in the released ST Package. and is there any particular guidance on the usage for t

Hi All,I have a problem with tag generating for CRYP_AES_GCM_GMAC. The main crypting is fully working, but AuthTag is generated wrongly. It is strongly depend when the generating is started. When you change for (int i = 0; i < 10000; i++) {}; you will receive different values. I have no idea, what is wrong. (CRC clocks on)Supposed data: uint8_t tag[16] = { 19, 74, 107, 250, 55, 74, 33, 198, 182, 189, 43, 1, 146, 146, 24, 92 };Milanvoid TestCryptoAES(void){   CRYP_HandleTypeDef hcryp;   uint8_t InitVector[AES_BLOCK_SIZE] = { 10, 0, 0, 0, 4, 3, 2, 1, 100, 231, 96, 38, 0, 0, 0, 2 };   uint8_t   AES128key[AES_BLOCK_SIZE] = { 118, 101, 114, 121, 118, 101, 114, 121, 115, 101, 99, 114, 116, 107, 101, 121 };   // input "raw" data   uint8_t   plainText[AES_BLOCK_SIZE] = { 1, 2, 0, 12, 1, 2, 3, 4, 0, 0, 0, 10, 0, 0, 0, 0, };   // input crypted data    uint8_t&

I would like to use the mbedTLS version 2.28.2.v2 on the secure boot for stm32h743ii controller. I have downloaded SBSFU v2.6.2 and Built the secure boot binary on top of the example project from H753 2_images_OSC folder. Secure boot is running the target hardware. But the .sfb file is not upgradable with the secure boot and it throws the FW authentication error.I suspect that the .sfb file created by windows executable exe is not using the integrated mbedTLS version 2.28.2.v2 somehow. Please suggest the next step.Regards,Rakkumuthu R

We have one STM32h563zi board on which first We blink the normal led program, After that We perform the Secure Boot by taking the reference from STmicro official website, Secureboot run successfully. We run the regression script .Now the board should come out from the Secure boot, but When we try to blink the led program, it's not blinking.When we are try to debug it it's showing hard fault.Why ?

Hello all.Another question regarding SBSFU, this time 1 image version.When we download new image via YMODEM, when does decryption process happen?1. Is new image first downloaded into active image slot and then decrypted?2. Is new image downloaded and decrypted at the same time, which is basically decryption on the fly, but that requires special hardware accelerator? Thanks in advance!

Ask this at arm.com, but maybe it is STM32U5 specific:I try run an unprivileged application in secure mode and get a strange behavior:STM32U5 has TZ enabled, all application runs in secure mode.1) LR = 0xffff_fff9, CONTROL = 1 => BX LR increments the SP, but all registers become 0 (including PC and XPSR!)2) When setting CONTROL = 1 and executing SVC, SP is decremented correctly, but nothing is stored on the stack?I check all errata I could find, but no hint.If TZ is disabled, the system behaves normal.42Bastian

Hi Community,I'm porting STM32G071 SBSFU to STM32G0B1RE and Customizing UART to USB CDC.I'm using Nucleo-G0B1RE dev kit and STMCubeIde for development.1. I'm able to build, load, run both STM32G071 SBSFU and UserApp without any changes. but when I change project global symbol STM32G071xx to STM32B1xx in properties->Settings->Preprocessor->Define Symbols. The have made appropriate changes after loading USERApp causes hard fault and resetting device.2. Also tried changing sbsfu and fwimg .ld files for rom and ram address with/without changing define symbols above mentioned also had similar issue.Now I am stuck without knowing what needs to change and how to port the code to STM32G0B1 ?Can you please help with require changes to port from STM32G071 to STM32G0B1 ? TIA,Tarun 

Hi,I  changed symbol in the properties tab to adapt STM32G0B1xx drivers causing hard fault after loading User App. The hard fault occurs in sbsfu while verifying the user fw signature.can someone help me why fw signature verification failed just changing  symbol to STM32G0B1xx ?  

I am using the SBSFU STM32CubeExpansion_SBSFU_V2.6.2 version for my custom board STM32H743VI controller. I have ported the STM32H7B3I-DK project for H743 controller for COM port and changed the crypto scheme to SECBOOT_ECCDSA_WITHOUT_ENCRYPT_SHA256. I am getting below logs and hangs. It hangs in the below code,SE_ErrorStatus SE_VerifyHeaderSignature(SE_StatusTypeDef *peSE_Status, SE_FwRawHeaderTypeDef *pxFwRawHeader){ SE_ErrorStatus e_ret_status; uint32_t primask_bit; /*!< interruption mask saved when disabling ITs then restore when re-enabling ITs */ /* Check if the call is coming from SFU code */ __IS_SFU_RESERVED();#ifdef SFU_ISOLATE_SE_WITH_MPU if (0x0U != SE_IsUnprivileged()) {  TRACE("\r\n inside privilege");  uint32_t params[1] = {(uint32_t)pxFwRawHeader};  SE_SysCall(&e_ret_status, SE_CRYPTO_HL_AUTHENTICATE_METADATA, peSE_Status, &params);  TRACE("\r\n after secall"); }After SE_SysCall() call,

Dear Sir.I am trying to work with the examples of TFM_Appication and SBSFU_Boot examples of STMCube_FW_U5_V1.2.0 when compilng I get the error Error: Missing option '-S' / '--slot-size'.postbuild.sh failedmake[1]: *** [makefile:92: post-build] Error 1make: *** [makefile:60: all] Error 2"make -j16 all" terminated with exit code 2. Build might be incomplete.Error: Missing option '-S' / '--slot-size'.postbuild.sh failedmake[1]: *** [makefile:92: post-build] Error 1make: *** [makefile:60: all] Error 2"make -j16 all" terminated with exit code 2. Build might be incomplete.Please Advise,

Hi Guys,Ported SBSFU 2.6.2 to STM32G0B1CEU6 (512K FLASH and 64K RAM) based on Nucleo-G071RB example.Modified mapping_fwimg.ld as below: /* Slots must be aligned on 2048 bytes (0x800) */ /* swap (4 kbytes) */ __ICFEDIT_SWAP_start__ = 0x08042000; __ICFEDIT_SWAP_end__ = 0x08042FFF; /* Active slot #1 (200 kbytes) */ __ICFEDIT_SLOT_Active_1_start__ = 0x08010000; __ICFEDIT_SLOT_Active_1_end__ = 0x08041FFF; __ICFEDIT_SLOT_Active_1_header__ = __ICFEDIT_SLOT_Active_1_start__; /* Dwl slot #1 (200 kbytes) */ __ICFEDIT_SLOT_Dwl_1_start__ = 0x08043000; __ICFEDIT_SLOT_Dwl_1_end__ = 0x08074FFF; /* Slots not configured */ __ICFEDIT_SLOT_Active_2_header__ = 0x00000000; __ICFEDIT_SLOT_Active_2_start__ = 0x00000000; __ICFEDIT_SLOT_Active_2_end__ = 0x00000000; __ICFEDIT_SLOT_Active_3_header__ = 0x00000000; __ICFEDIT_SLOT_Active_3_start__ = 0x00000000; __ICFEDIT_SLOT_Active_3_end__ = 0x00000000; __ICFEDIT_SLOT_Dwl_2_start__ = 0x00000000; __ICFEDIT_SLOT_Dwl_2_end__ = 0x00000000; __ICFEDI

Error in final launch sequence:Failed to execute MI command:load D:\\STUSER\\STM32CubeIDE\\workspace_1.13.0\\TEST190923\\Debug\\TEST190923.elfError message from debugger back end:Error finishing flash operation

Hello all,I have a question about possibility of splitting/dividing FLASH sector for active/download image slots.A bit more context... My target MCU is STM32F756ZGTx, here is its FLASH memory map:What we want to do is: assign sector 4 (128 kB) and sector 5 (256 kB) as a download image slot; assign sector 6 (256 kB) and half of sector 7 (1/2 * 256 kB = 128 kB) as an active image slot.My question is: can we do that?As far as I understand, SWAP and active/download slots should be aligned with FLASH sectors, so the answer would be "NO", but maybe I'm wrong.Thank in advance!

Good morning, I am facing an issue related to the usage of the CRC on the G070RB microcontroller (and user manual RM0454), specifically concerning the use of hardware-based CRC-16 MODBUS for a project currently under development at the company where I work. I have observed that when the CRC polynomial is set to 16 bits, the CRC chip processes the entire DR (Data Register) as 32 bits. In other words: my sequence 0xF704 is treated as 0x0000F704, where the chip first applies the CRC to the initial two bytes (0x0000) and then uses its CRC as the initial CRC to compute 0xF704. Consequently, through the microcontroller, I obtain a final CRC of 0xD747 instead of the expected 0x4346. Is there a way to apply the CRC only to 0xF704 while "masking" the 0x0000 in front of it? This issue becomes apparent when sending an odd number of 16-bit packets. Below is a draft of the code I have used: // Enable CRCuint32_t *RCC_AHB = 0x40021038;*RCC_AHB |= (1 << 12);// Set RefIn, RefOut bit by bit and P

..

Hi ST fanboys, I am using the STM32WL55 device and have implemented the latest cryptolib (4.1).This is all working fine with correct AES encryption and decryption, up to the moment that I start implementing the low power features and switch of all unused clocks and blocks. At that point the cryptolib features stop working.Sadly the Cryptolib documentation (what is available when looking hard) does not specify what hardware features of the STM32WL device are used ie. what clocks, what HW blocks???Can somebody point these out so I can activate those blocks when I come out of standby/stop mode and so that I can turn them off again when going into standby/stop mode.Features used in Crypto are TRNG, AES_CBC, AES-CTR thanks in advance

I am unable to import the TFM app for the B-U585I-IOTO2A board using MacOS Ventura 13.5.1. Every time I attempt it the importer takes a long time, then fails with a 'Fail on internal error' message. I am using the Import STM32Cube Example method of importing. In order to fix the problem I have done the following:1. Deleted and reinstalled STM32CubeIDE 1.13.12. Deleted and reinstalled the U5 library version 1.3.03. Rebooted the MacBook computerThese did not help at all. I have successfully installed the 3 required TFM projects for the STM32L562E-DK board. Those three projects installed in just a few seconds. It seems there is something wrong with the U5 TFM project. If I can provide further information, please let me know.

Hi,I've been exploring cryptography support on the STM32 uCs, especially on the L4 series. I'm able to run the X-CUBE-CRYPTOLIB code to perform AES-GCM, but it's very slow. It takes roughly 4ms to encrypt and tag 80 bytes, with a master clock of 8MHz. From looking at the debugger, it seems like the AES hardware peripheral is not being used, so it makes sense it's performing so poorly. I couldn't find any define in the .h files to configure it to use hardware support and I'm seeing conflicting statements from differents pieces of documentation. The Reference Manual for the L4 family states that "The AES peripheral provides hardware acceleration to AES cryptographic algorithms packaged in STM32 cryptographic library.".This version of the library documentation (from 2015) states that: "For dedicated devices some algorithms are supported with hardware acceleration, to optimize the performance and the footprint usage"However, the more recent version states that: "To benefit from STM32

HiI have downloaded en.x-cube-aws_v2-0-0.zip file. Imported STM32CubeExpansion_Cloud_AWS_V2.0.0\Projects\B-L4S5I-IOT01A\Applications\Cloud\aws_demos project in to STMCube IDE.(Version: 1.10.1)I am able to build B-L4S5I-IOT01_2_Images_SBSFU and B-L4S5I-IOT01_2_Images_SECoreBin projects without any issues.But the B-L4S5I-IOT01_aws_demos build fails with the following errors - Description Resource Path Location Typecannot use executable file '../../../../BootLoader_STSAFE/2_Images_SBSFU/STM32CubeIDE/B-L4S5I-IOT01_2_Images_SBSFU/Debug\se_interface_app.o' as input to a link B-L4S5I-IOT01_aws_demos C/C++ ProblemIs anyone facing a similar issue? any pointer to download AWS demo application for b-l4s5i-iot01a IoT eval boardRegardsDhanya

Almost all sample projects have support of STMCubeIDE in the development board B-U585I-IOT02A except following bootloader projects.SBSFU_AppliSBSFU_BootSBSFU_LoaderOn release note it is mentioned that, will be added support in the next release but date is not mentioned. May I know the date by which we will get the STMCubeIDE support?

Hello,The new SBSFU 2.6.1 is available now.The main change concerns the compatibility with latest STM32CubeIDE based on GNU Tools 10.3 which are version 1.9.0 and 1.10.1There is no need anymore to follow the steps provided previously to have a successful build. The new SBSFU version 2.6.1 includes the same change that was proposed in this postAlso, it is no more needed to fill the export control form.SBSFU can now be downloaded like any other package on st.com !Enjoy :grinning_face: Best regardsJocelyn

I'm using X-CUBE-CRYPTOLIB v4.1.0 on an STM32H735. I'm using the libSTM32Cryptographic_CM7.a static library supplied by the crypto library.I'm running into an interesting issue where the address that the binary library is using for the CRC peripheral is wrong, but only when running under emulation (I'm using Renode.io). Running on the real device does not have this issue. The firmware used in both cases is identical (i.e. I'm loading the same firmware binary into Renode or into the STM32).For the STM32H735, the CRC peripheral is at 0x58024c00, which is off D3_AHB1. This is all computed in the stm32h735.h header file supplied by the HAL. If I check the macro definitions in my C source, everything lines up correctly.Tracing around in the assembly code in the crypto library, it looks like cmox_md_generateTag is finding the address of the CRC peripheral through a bit of math, a lookup table and a value passed to it by cmox_hash_common_compute() which is called by cmox_sha224_comp

Hello,We'd like to integrate with some customers smartcard infrastructure.We cannot control which cards and standards are used and therefore would need an MCU that can read all cards possibly in use.Private keys will be provided by the customers.If we'd need several MCUs, please tell us the complete list.Best wishes,Fabiano

Hello,I'm using SBSFU to secure firmware runs and firmware upgrades. My target board is a custom board with F429ZI and external SPI Flash, but for the beginning, I've started testing with NUCLEO-F429ZI.I have successfully ported "2-Images" example from F417-Discovery to my Nucleo board and everything looks to work fine, however, when I try to expand the size of active and download slots, I face a memory fault.The F429ZI has a 2MB Flash arranged in 2 banks of 1MB, but I found that I can use the entire Flash without utilizing dual-bank architecture, I just use it as a single 2MB flash.If I arrange the slots layout as below everything works fine: /* swap (128 kbytes) */ __ICFEDIT_SWAP_start__ = 0x08100000; __ICFEDIT_SWAP_end__ = 0x0811FFFF; /* Active slot #1 (768 kbytes) */ __ICFEDIT_SLOT_Active_1_start__ = 0x08040000; __ICFEDIT_SLOT_Active_1_end__ = 0x080FFFFF; __ICFEDIT_SLOT_Active_1_header__ = __ICFEDIT_SLOT_Active_1_start__; /* Dwl slot #1 (768 kbytes) */ __ICFEDIT_SLOT_Dwl_1_