STM32 MPUs

Hi,I am trying to enable secure boot in STM32mp157f-ev1 board. I am using the Developer Package source code provided by ST. I am using this command to generate the tf-a.stm32:make E=0 -f ../Makefile.sdk.stm32mp1 TF_A_DEVICETREE=stm32mp157f-ev1 TF_A_CONFIG="optee-sdcard optee-programmer-usb" TRUSTED_BOARD_BOOT=1 GENERATE_COT=1 ROT_KEY=<path>/privatekey.pem ROT_KEY_PWD=<password> KEY_ALG=ecdsa MBEDTLS_DIR=<path>/mbedtls-3.4.1 DYN_DISABLE_AUTH=0 DEPLOYDIR=$FIP_DEPLOYDIR_ROOT/arm-trusted-firmware stm32But I am getting an error:LD SOURCES-stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/sources/ostl-linux/tf-a-stm32mp-v2.10.13-stm32mp-r2-r0/tf-a-stm32mp-v2.10.13-stm32mp-r2/../build/optee-sdcard-stm32mp157f-ev1/bl2/bl2.elfarm-ostl-linux-gnueabi-ld.bfd: SOURCES-stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/stm32mp-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11/sources/ostl-linux/tf-a-stm32mp-v2.10.13-stm32mp-r

  Hello Team,I am currently working on QuadSPI with MDMA, but I am unable to locate the driver code for this functionality.Could you please provide the required driver code?For reference, I am working on the STM32MP133F series.Regards,Sreedhar Kaduru  

Hello,Is there a list of supported/recommended displays that are compatible with the DSI connector CN4 on STM32MP157D-DK1 please?Kind regards,Al  

I am porting Linux to a board that uses the STM32MP255F.I used the BSP from the STM32MP257F-DK board.For now, I was able to get the LCD panel to display, but the weston-graphical-session did not start.When I added the following line to /etc/default/weston, the weston-graphical-session started:OPTARGS=--use-pixmanThe demo menu appears, and I can launch the demos.However, the GPU demos do not run.As I understand it, the OPTARGS=--use-pixman setting is meant for when there is no GPU.Since the GPU demos also do not run, it seems that the GPU is not operating.Under what conditions does the GPU fail to operate?For reference, the Device Tree gpu section is configured as follows:&gpu {contiguous-area = <&gpu_reserved>;status = "okay";};Another thing I am concerned about is that the initialization around usb3dr does not match the custom board, so I have disabled it.&m33_rproc {mboxes = <&ipcc1 0x100>, <&ipcc1 0x101>, <&ipcc1 2>;mbox-names = "vq0",

I've got a custom board with an STM32MP135AAE3 talking to an eMMC (THGBMTG5D1LBAIL if it makes a difference). I've discovered that if I write from SYSTEM to the eMMC using DMA (HAL_MMC_WriteBlocks_DMA) it works fine, but if I use anything in RAM (SRAM1, SRAM2, or SRAM3) as the source, the DMA fails immediately.If it helps, the SDMMC2 registers inside SDMMC2_IRQHandler() are: STA=0x8001010; DCOUNT=0x200; DCTRL=0x90; IDMACTRL=0x1; MASK=0x11AIs this a known limitation of the IDMA? If not, is it something I'm somehow initializing incorrectly?

Hello ST Team,I am evaluating the STM32MP215F-DK with the recommended M.2 Wi-Fi/BT module (Embedded Artists EAR00409 / Murata 2EL). I have encountered two critical issues that prevent the Wi-Fi features from working out-of-the-box with the standard Starter Package.I believe these are bugs in the current hardware/software release.1. Critical Software Configuration Issue: SDMMC2 Access Blocked by RIFThe STM32MP215F-DK Data Brief explicitly states that the board features an "M.2 E-Key connector to support Wi-Fi® and Bluetooth® SDIO modules". However, with the default Starter Package (OpenSTLinux 6.6), the Linux kernel fails to probe the Wi-Fi module on SDMMC2.Symptoms:• Linux kernel log shows no response from mmc1 (SDMMC2).• Attempting to access the SDMMC2 registers manually via devmem 0x48230000 results in a Bus Error.• OP-TEE console reports a firewall exception: SERC exception ID: 77 (SDMMC2 Illegal Access).Root Cause Analysis: It appears that the Trusted Firmware-A (TF-A) device tree

In the STM32MP257F-DK Linux BSP, I believe that the initialization of the USB3DR peripheral devices (TCPP03-M20, CC1_EN, CC2_EN) is performed by the M33 core executing the following program:/usr/local/Cube-M33-examples/STM32MP257F-DK/Demonstrations/USBPD_DRP_UCSI/lib/firmware/USBPD_DRP_UCSI_CM33_NonSecure_stripped.elfWhere can I find the source code of this program?I have created a board using the STM32MP255F with a configuration similar to the STM32MP257F-DK board.The hardware configuration around USB3 is the same, but some pinctrl and I2C bus channels are different.Therefore, I would like to modify and use USBPD_DRP_UCSI_CM33_NonSecure_stripped.elf.

Hi,We are trying to make use of the ethernet interface in this fashion:- The board is a custom one with a soldered module from Karo, the qsmp-2550, that includes an stm32mp255fa.- The eth2 is connected to a PHY (TI DP83869HM) in RGMII.- The PHY is then configured to output Base100-FX to an SFP cage.- There is no CLK125, we use ck_ker_eth2 configured at 125Mhz (confirmed in /sys/kernel/debug/clk/stm32_clk_summary), we use the `st,ext-phyclk` DT property.The PHY is reachable via mdio using the CLI from mdio-tools and seem to be working as intended.We checked that the PHY sends the correct clock, the RX one, with a scope: it does.Then when enabling the link using `ip link set up eth0` we are greeted with:```root@qsmp-2550:~# ip link set up eth0[ 16.583371] stm32-dwmac 482d0000.eth2 eth0: Register MEM_TYPE_PAGE_POOL RxQ-0[ 16.586971] stm32-dwmac 482d0000.eth2 eth0: Register MEM_TYPE_PAGE_POOL RxQ-1[ 17.123948] stm32-dwmac 482d0000.eth2 eth0: PHY [stmmac-1:00] driver [TI DP83869] (irq=

Hello ST community,I’m an embedded software beginner working with the STM32MP257-DK board and OpenSTLinux (Yocto). I need help getting USART6 working on the external GPIO connector (PF13 = TX, PF14 = RX — CN5 pins). I have rebuilt device trees and copied DTBs to the board, but the USART6 device never appears in the running system (/dev/ttySTM6), and at one point my Ethernet/SSH stopped working after applying a DTB change.I will be blunt: I have spent many hours following suggestions, debugging, and fixing syntax errors in DTS files. I may be missing one critical detail about how ST maps peripherals on the DK board or about kernel bindings. I have documented exactly what I tried and the exact outputs — please read fully before replying. I am a beginner; please do not assume I know advanced DT or U-Boot internals.Environment / versionsBoard: STMicroelectronics STM32MP257F-DK (discovery/“DK” board)Host SDK: SDK-x86_64-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11Kernel source / s

I have built a custom board by using STM32MP257F and I want to boot on USART6. I have not succeed to boot on USART6 when I compile my own fsbla by change the device tree of TF-A.I got a suggestion from ST Dev team to run this ROM tracedump wiki-stm32mp-addons/MP2RomTracesDump at 6.1.0 · STMicroelectronics/wiki-stm32mp-addons · GitHub and it gave me a positive output on USART6. The soldering was OK. The BootROM was OK and the UART6 was alive. This is the output from my USART6.=================================================== == STM32MP25 cut2.x bootrom display traces V1.01 == == Date of compilation : Jun 26 2024 - 11:25:23 == =================================================== Executed on Cortex A35 - Aarch64 Successfully booted on interface SD instance 1 Reset reason : POR reset Chip state : CLOSED_UNLOCKED ================================================================== Bootrom traces ================================================================== [INFO] -

I am trying to build the OpenSTDroid kernel, I first acquired the "STM32MPU Distribution Package for Android", Then as mentioned in https://wiki.st.com/stm32mpu/wiki/How_to_build_kernel_for_Android, I loaded the kernel & Then tried to build the dtb binaries using:build_kernel dtbAnd got the following error:$ build_kernel dtb[1/1]: Generate dtb binariesERROR: Not possible to generate the kernel imageAfter commenting out the &>${redirect_out} part where make is generating the dtb files, I get the following output:$ build_kernel dtb[1/1]: Generate dtb binariesmake[1]: *** No rule to make target 'dtbs'. Stop.make: *** [Makefile:256: __sub-make] Error 2ERROR: Not possible to generate the kernel image

I have used HSEM on STM32H7 very well.Recently，I test the HSEM of STM32MP257 in development mode， by JTAG/SWD，I can lock the semaphore by reading the HSEM_RLRx register via CPU1~3, but after power reset，when I write the HSEM_RLRx register to lock or unlock semaphore, it doesn't work!the security /privilege / CID filtering of HSEM are all off after reset, and the cpu3 could  access the HSEM_RLRx register correctly，but after cpu1/2  write the HSEM_RLRx register or HSEM_CnIER，both lock and unlock operations have no effect.pls give me some suggestions to check what I might have done wrong .thanks!

Hello, I am working with an STM32MP135f-dk device running Linux and trying to evaluate the possibility of using the USART peripheral in synchronous mode (TX/RX + CK). From a hardware point of view, the STM32 USART clearly supports synchronous operation. However, when using the standard STM32 USART Linux kernel driver, the peripheral is only exposed as a /dev/ttySTM* device and operates strictly in asynchronous (UART) mode. As far as I can see, the current driver does not enable or drive the CK clock signal, which makes true synchronous USART communication impossible under Linux, even though the underlying hardware is a USART. My questions are:1. Is this limitation expected by design in the current STM32 Linux USART driver? 2. Has anyone successfully implemented synchronous USART on STM32 under Linux, for example by: Extendimg the existing driver, writing a custom kernel driver, or using an alternative ?

I opened a PR on https://github.com/STMicroelectronics/u-boot.git for a patch that is applicable only downstream, and since I did not receive any response, I contacted Patrice Chotard, who told me to contact you for submitting downstream patches.In addition to U-Boot, I have patches to submit to:https://github.com/STMicroelectronics/linux.githttps://github.com/STMicroelectronics/meta-st-openstlinux.githttps://github.com/STMicroelectronics/meta-st-stm32mpCould you please guide me on how I should proceed?Thanks and regards,Dario

Recently，I test STM32MP2 with STM32MP257F-EV1 board.I want to debug A35 core with STLINKV3 that on the STM32MP257F-EV1 board，does it support ?And which cores are the STLINK-V3EC can support,except cortex M.

Hi everyone, I am trying to bring up the DP83867 with RGMII on the STM32MP131DAG7. However I am getting the following error:[ 18.253959] stm32-dwmac 5800a000.ethernet end0: renamed from eth0 [ 23.695184] stm32-dwmac 5800a000.ethernet end0: Register MEM_TYPE_PAGE_POOL RxQ-0 [ 23.756147] stm32-dwmac 5800a000.ethernet end0: PHY [stmmac-0:00] driver [TI DP83867] (irq=POLL) [ 24.764629] stm32-dwmac 5800a000.ethernet: Failed to reset the dma [ 24.769435] stm32-dwmac 5800a000.ethernet end0: stmmac_hw_setup: DMA engine initialization failed [ 24.808705] stm32-dwmac 5800a000.ethernet end0: __stmmac_open: Hw setup failed I saw this is typically due to the 125MHz clock not being generated. In our schematic, we have the CLK_OUT from phy going to ETH_RGMII_CLK125. I noticed the phy was not generating a clock so using the "mii" tool in U-Boot, I tried to generate the clock by updating the 0x0170 register: Link I was unable to get any clock to generate even though the 25MHz clock

Hi,I'm using brand-new, unmodified st32mp257f-dk dev board.When using starter package (https://www.st.com/en/embedded-software/stm32mp2starter.html#get-software) flashed onto sdcard according to https://wiki.st.com/stm32mpu/wiki/How_to_populate_the_SD_card_with_dd_command, system boots-up fine, see 'downloaded_no_panic.log'. Version is openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11.When using image built on my own - distribution package  (openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11)  according to https://wiki.st.com/stm32mpu/wiki/STM32MPU_Distribution_Package, using docker, I get following:[ 8.296788] usb 1-1: new high-speed USB device number 2 using ehci-platform [ OK ] Found device /dev/hwrng. [ OK ] Found device /dev/tee0. [ 9.041963] hub 1-1:1.0: USB hub found E/TC:0 0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r2/core/drivers/clk/clk-stm32mp25.c:2000 <clk_stm32_pll_init> [ 9.142742] hub 1-1:1.0: 2 ports detected E/TC:0 0 TEE load ad

Dear All,I have a total of 8 boards with eMMC from Alliance Memory. All of them boot from SDCard and work well. On 4 of them eMMC is detected correctly and boots fine with 50Mhz/8bit/ddr speed.4 boards are failing in exactly the same manner, that is:  EXTCSD/CID registers have some wrong values and eMMC is discovered as 128MB (instead of ~4GB), with with wrong manuf. ID and manufacturer code. Writing gives io-error (timeout) - reading returns "ER18" ascii code every 512bytes.I have lowered down params of sdmmc interface down to: 400kHz / 1 bit / no-ddr, with different slew-rates on IO ports without a success. I've observed these changes on an oscilloscope and also with simple logic analyzer on lower speeds/1bit bus. Failure is persistent between restarts and also between boards. I have also manipulated series resistors and pull-up resistors.Normally I'd expect some layout issues, but this failure mode is really stable and I am looking for other ideas. I can't imagine tha

Please check STM32MP157F-DK2 no function issue after STM32MP157F-DK2.#1. After receiving the STM32MP157F-DK2 board, I connected a 5V/3A Type-C Power Adapter to CN6 and verified Linux boot and operation. LCD operation.#2. Updated the Linux image on the SD card using STM32Cube Programmer on a Windows PC.Following the procedure in the link below, successfully updated the Linux flash image to the SD card using FlashLayout_sdcard_stm32mp157f-dk2-optee.tsv via STM32Cube Programmer on the Windows PC.https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-DK2/Let%27s_start/Populate_the_target_and_boot_the_image#3. Turn SW1 BOOT0 and BOOT2 back ON, connect the USB Cable to the ST-LINK (CN11) on the PC, and connect the 5V/3A Type-C Power Adapter to CN6 to boot the stm32mp157f-dk2 board.#4. UART logs output normally, but the message "ERROR USB TYPE-C connection in unattached mode" appears and Linux does not boot. - The same Type-C Power Adapter used in #1 above was

Hello I am planning to use STM32mp257Fak3 with DDR3L (16bit and 32 bit saperately),can you suggest some DDR part no and it's sonnection.

Hi,I’m working on STM32MP257F-DK (A35 + M33) using OpenAMP + RPMsg over IPCC and facing an issue with RPMsg endpoint creation on the M33 side.GoalSimple use case:Linux (A35) sends "START" / "STOP"M33 receives the message via RPMsgM33 toggles an LEDWhat is workingM33 firmware builds and boots correctly using remoteprocResource table is detectedVirtio RPMsg is created on Linux From Linux dmesg:virtio_rpmsg_bus virtio0: rpmsg host is online remoteproc remoteproc0: remote processor m33 is now upSo remoteproc and OpenAMP transport are working.ProblemWith the following M33 code, RPMsg endpoint is not getting created on Linux side:int rpmsg_recv_callback(struct rpmsg_endpoint *ept, void *data, size_t len, uint32_t src, void *priv) { if (len >= 5 && strncmp((char *)data, "START", 5) == 0) { led_run = 1; } else if (len >= 4 && strncmp((char *)data, "STOP", 4) == 0) { led_run = 0; HAL_GPIO_WritePin(GPIOZ, GPIO_PIN_0, GPIO_PIN_RESET); } return 0; } stru

Hello,I am working with an STM32MP151 and I would like to start the Cortex-M4 core as early as possible during the boot sequence.The main requirement is to run a real-time task on the M4 that reads an analog input (ANA0 – ADC channel) with minimal startup latency.In my current setup, the ADC channel is first owned by the Cortex-A7 Linux kernel and is explicitly released and reassigned to the Cortex-M4 via the Linux device tree (by disabling the ADC node for A7 and assigning it to the M4).Additionally, if I stop the system in boot mode and manually start the Cortex-M4, I am able to successfully debug the M4 firmware and correctly read the ADC value.My goal is to have the M4 firmware start automatically in the same early boot conditions, without requiring a manual boot/debug sequence.I would like to understand:At which earliest boot stage the Cortex-M4 can be releasedWhether the Cortex-M4 can be started independently from the Linux boot on the Cortex-A7Thank you in advance for your suppo

Hello,Currently I'm working on a project that requires a synchronized clock signal between multiple devices connected through Ethernet.The logic solution for this is PTP, and using linuxptp I was able to archive synchronous PPS on PG8 pin between devices with a jitter smaller than 1us for 1Hz. Now the problem is that the requirement for PPS frequency is not 1Hz but a OR between a 100Hz and 1.25Hz (see attached image). From documentation, flexible PPS output may be the solution and started testing it by generating the 100Hz signal. Here is were I found the issue, after program PPSCMD[3:0] with start I notice that the 100Hz signal starts to drift slowly (around 20us/s).Now strange part is if I use fixed PPS (bit PPSEN0 of MACPPSCR cleared) with any frequency (1Hz to 16kHz with digital rollover) there is  no drift. From my understanding the reference clock for pps is the same as system time thus adjusted by ptp protocol for maintaining synchronization.Is my assumption corre

Hello!I am in the progress of setting up a Yocto based build for a custom board based on a STM32MP157C. I am using "vanilla" Yocto scarthgap with the respective ST meta layer: https://github.com/STMicroelectronics/meta-st-stm32mp meaning I created a custom machine and am patching my own device trees into the meta-st-stm32mp layer.Currently I am trying to port my device trees for TF-A , OPTEE, U-Bboot and Linux, that were originally created for an SDK based build, to the new environment. I am using the regular "optee" bootscheme in my custom maschine.conf with EMMC as boot device.The build already succeeds but when I try to program the contents of my .tsv via Cube32Programmer I get a "iwdg1" reset when the bootfs is downloaded:UPLOAD ... done Ctrl+C to exit ... #DOWNLOAD ... OK Ctrl+C to exit ... # UPLOAD ... done Ctrl+C to exit ... # UPLOAD ... done Ctrl+C to exit ... ###D/TC:0 gic_native_itr_handler:678 Special interrupt 1023 D/TC:0 gic_native_itr_handler:678 Special interru

hey currently i am working on stm32mp257dak3 on myir myc-ld257 board  in which i want to access RCC of gpiog for i2c3,  but i am enable to access it as soon as i try to access without resource manager it shows me "root@myd-ld25x:~# echo start > /sys/class/remoteproc/remoteproc0/state E/TC:1   stm32_iac_itr:192 IAC exceptions [159:128]: 0x10000000 E/TC:1   stm32_iac_itr:197 IAC exception ID: 156 E/TC:1   Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r1/core/drivers/firewall/stm32_iac.c:212 <stm32_iac_itr> E/TC:1   TEE load address @ 0x82000000 E/TC:1   Call stack: E/TC:1    0x82007ed8 E/TC:1    0x8203bb8c E/TC:1    0x82026308 E/TC:1    0x820396c0 E/TC:1    0x82013c0c E/TC:1    0x820017dc I/TC: Halting CPU 0" this error and my linux gets crash (on board linux not in my laptop)   but when i uses resource manager " if (ResMgr_Request(RESMGR_RESOURCE