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Associate III
May 29, 2025
Solved

SSD insert PCIe and start System Report IAC exceptions

  • May 29, 2025
  • 1 reply
  • 596 views

 

Starting kernel ...

I/TC: Secondary CPU 1 initializing
I/TC: Secondary CPU 1 switching to normal world boot
E/TC:0 stm32_iac_itr:180 IAC exceptions [159:128]: 0x400
E/TC:0 stm32_iac_itr:185 IAC exception ID: 138
E/TC:0 Panic at /usr/src/debug/optee-os-stm32mp/3.19.0-stm32mp-r2-r0/core/drivers/firewall/stm32_iac.c:200 <stm32_iac_itr>
E/TC:0 TEE load address @ 0x82000000
E/TC:0 Call stack:
E/TC:0 0x8200831c
E/TC:0 0x82030254
E/TC:0 0x82021024
E/TC:0 0x8202f198
E/TC:0 0x82013fd4
E/TC:0 0x820017dc

 

How can I confirm the RIF configuration of OpteeOS to resolve this issue?

 

Best answer by GatienC

Hello @bugman ,

If you want to confirm the RISAF configuration at runtime, you can always set

CFG_STM32_PANIC_ON_IAC_EVENT=n in OP-TEE. Therefore, the platform won't panic on an IAC. Then, you can dump the RIF configuration in the kernel using the debugfs entry. You can have a look at https://wiki.st.com/stm32mpu/wiki/How_to_analyze_IAC_%26_SERC_errors . If you don't have this RISAF available for dump in the debugfs, you need to activate the node in the linux board device-tree file.

However, I'm surprised that you don't have a more detailed dump with the faulty address (Similar to the example in the wiki)? Have you omitted that in the log? Else, maybe the non-TDCID/non-delegated CID software is accessing the RISAF registers directly and that's forbidden.

Regards,

Gatien

 

1 reply

GatienC
GatienCBest answer
ST Employee
June 2, 2025

Hello @bugman ,

If you want to confirm the RISAF configuration at runtime, you can always set

CFG_STM32_PANIC_ON_IAC_EVENT=n in OP-TEE. Therefore, the platform won't panic on an IAC. Then, you can dump the RIF configuration in the kernel using the debugfs entry. You can have a look at https://wiki.st.com/stm32mpu/wiki/How_to_analyze_IAC_%26_SERC_errors . If you don't have this RISAF available for dump in the debugfs, you need to activate the node in the linux board device-tree file.

However, I'm surprised that you don't have a more detailed dump with the faulty address (Similar to the example in the wiki)? Have you omitted that in the log? Else, maybe the non-TDCID/non-delegated CID software is accessing the RISAF registers directly and that's forbidden.

Regards,

Gatien

 

bugmanAuthor
Associate III
June 5, 2025

After check optee DTS, it is found that PCIe is disabled in the RISAF. It can be resolved by re - enabling it,thanks

Associate III
June 20, 2025

Hi bugman,
I’ve encountered the same issue. Would you mind showing me how to configure this in CubeMX?

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