STM32 MCUs Products

I am developing libraries for STM32G070RB and starting with DMAs TX and RX; the interrupts trigger for both modes. I am using STM32G070RB, Cube IDE (1.19.0)Description of task:I wish to make the library optional for the user.1. Option DMA (TX & RX) hardcoded to Channel 2 & 3.2. Option receiving an interrupt and write polling. The MCU has limited DMA, so I am dedicating Channels 2 & 3 for the USART: a single buffer if interrupt mode was selected and a double buffer in DMA with the IDLE interrupt trigger.  Though a generic template class for the 4 USARTs, I am currently testing using USART1.In the main.cpp file, I toggle PC1 to be sure the DMA and RXNE interrupts trigger. which appear fine. I also check within the handlerDMA and handlerIRQ, and all are working fine. The issue at hand:In DMA mode, if I read the DMA buffer (__dmarxbuf), I will see the exact received character; I also confirmed that in the DMA countdown register. I implemented

My company is developing a system that needs to download thousands of images from a computer to an STM32 development board via a local area network. The total size of the images may reach tens of GB (if possible, the data should remain even in the event of a power outage)At first, I considered using an external flash, but it seemed that STM32 did not support flash memory exceeding 256 MBytes. It appears that an SD card is the only solution; STM32 seems to support SD cards up to several TB.Am I correct?

Hi,I'm configuring the independent watchdog in the STM32F103xx medium-density using the registers.During the IWDG the PVU bit is not cleared by the hardware. The reference manual (page 498)  says the following:"PVU: Watchdog prescaler value updateThis bit is set by hardware to indicate that an update of the prescaler value is ongoing. It isreset by hardware when the prescaler update operation is completed in the VDD voltagedomain (takes up to 5 RC 40 kHz cycles).Prescaler value can be updated only when PVU bit is reset." RCC->CSR |= (0x1 << 0); // Enable LSI while (!(RCC->CSR & (0x1 << 1))); // Wait for the LSI to be ready IWDG->KR = 0x5555; // unlock PR and RLR IWDG->PR = 0x3; // Divided by 32 IWDG->RLR = 0xFFF; // 4096 - counter value while (IWDG->SR & (1 << 0)); // PVU <- #### GET TRAPPED IN HERE #### while (IWDG->SR & (1 << 1)); // RVU IWDG->KR = 0xAAAA; // reload the counter IWDG->KR = 0xCCCC

I am unable to start a PWM signal on my Nucleo board --> I was not able to observe a signal on an oscilloscope.Please see the following code and Cube configurations.1) Is the following code all that is necessary to start a PWM on a channel (given it is configured correctly in IOC)?2) I confirmed that I am connected to the right pin by toggling a GPIO prior to configuring for PWMHAL_TIM_PWM_Start(&htim2,TIM_CHANNEL_1); TIM2->CCR1 = 30; 

I have experienced this issue on STM32L4R and STM32U5. If debugging through STOP mode (with DBGMCU_CR_DBG_STOP set), the flash memory occasionally seems to read out garbage as the MCU is coming out of STOP mode. This typically causes the CPU to hard fault.Disconnecting the debugger and power cycling the MCU (to clear DBGMCU_CR_DBG_STOP), causes the same code to run perfectly. Alternatively, making any small code change that causes the WFI and subsequent code to change its address alignment in the flash also seems to fix the issue, even when running in the debugger. Another alternative is to increase the number of wait states, which also fixes the issue.Is this a known issue? Has anyone else experienced it?

When I'm enabling DMA and run the code, the debugger hangs at "SCB_EnableDCache();" even though the function is correctly excuting when I go step by step. Also as seen in the examples the problem gets solved when using a static declaration  "static void CPU_CACHE_Enable(void);"Is it the issue with the debugger or the code.

Is it possible to DMA DCMI data to external SPI PSRAM (8MB)? I don't have enough pins to place SDRAM and wish to buffer Camera data.

Hello,I wrote a Boot program in flash to initialize sdram and copy the app program to run in sdram. The current state is able to jump and run normally, but the length of jump time seems to be positively correlated with the size of global variables in my app. For example, if I define a 1MB size array in the app and use it, the jump time will be significantly longer for several seconds,May I ask why this is, is there any way to solve this problem? Thanks！

Hello, Just a quick question as I need confirmation :Using a STM32H7 ADC in a differential input mode, does this circuit work ?  The output of the op-amp is Vout = G * (Vin[+] - Vin[-]) + 1.65 .Then the ADC output should be between :[0 - INT16_MAX] when op-amp output is between 1.65V and 3.3V.[INT16_MIN - 0] when op-amp output is between GND and 1.65V.But from the datasheet it says that CMV (average between INP and INN) should be around Vref+/2. I'm not sure that's true here.So can you confirm this wont work and I should do single-ended and substract 1.65V from the result ?Regards, Adrien 

I have a project running on my Stm32H7. I imported my ethernetif/lwip settings from the Stm32CubeH7 H723 lwip + freertos http server example, but made some small changes. For the most part in the most basic sense, the driver works and my board at least gets a DHCP lease and responds to ping, but I am getting an assert:"Assertion "pbuf_free: p->ref > 0" failed at line 753 in [......]/LwIP/src/core/pbuf.c"I've read so many topics on the state of Ethernet in the Stm32H7. Because of the ST community manager locking threads where fixes are discussed, I honestly don't know the current state of the drivers, except I can guess that this is an issue having to do with pbufs getting clobbered. I've seen the large zip file from https://community.st.com/t5/embedded-software-mcus/bug-fixes-stm32h7-ethernet/td-p/281420, but I don't know how out of date this is or how many of these issues have truly been fixed now. If the drivers in the CubeH7 drivers are working, what am I doing

Hello,Using the STM32CUBEPROGRAMMER v2.2.0 + the NUCLEO-N657X0-Q :I tried to set the OTP_124 -> HSLV_VDDIO3 bit to 1 but it did not suceed. First, I read the whole otp, put 1 in that field then press Write and it did not work, the OTP_124 stays at default 0x00000 . The nucleo-n6 is is dev mode (BOOT0 = 0, BOOT1 = 1). I would like to understand why it was not writing the new value of 1 and stayed at default value 0x0000 ?I checked the Lock checkbox and pressed Write again and now the OTP124 is greyed-out. Is there a way to revert this  (now it says permanent write lock).Thank you.  

Hi,I am using NCLEO-U385RG-Q  running STM32u385.  I created a project using the board selector.  I configured I2C2 using STM32CubeIDE to run in fastmode at 400khz for PINs PA6/PB2 per schematics described in MB1841.  My clock sources are all defaults (see attached) also my calculated timings (attached).  I run the code and the timing doesn't match what I programmed.  I am seeing an I2C clock at around 13.158 MHz.  Can you please assist? Thank you

I have developed software on the Nucleo-L433RC-P development board which uses the STM32L433RCT6P MCU (the P defines it has 2 x VDD12 pins for an external SMPS).However, I have designed a PCB that uses the STM32L433RCT6 (no VDD12 pins) but want to continue developing the software on the development board until my PCB arrives.To retarget the MCU, I edited the .ioc file and changed STM32L433RCTxP to STM32L433RCTx.I flashed the software to the Nucleo-L433RC-P board, but I am getting strange and random issues.It seemed to work to start with, but after several further flashes it stopped working with the error shown below...I'm not sure but it seems to go to a reset handler in "startup_stm32l433rctxp.s"....The console shows the following error...STMicroelectronics ST-LINK GDB server. Version 7.11.0 Copyright (c) 2025, STMicroelectronics. All rights reserved. Starting server with the following options: Persistent Mode : Disabled Logging Level : 1 Listen Port N

Hello,I'm encountering an issue while testing the Standby Mode on my device.Most of the time, the device enters and wakes from Standby Mode successfully. However, after repeated testing, it occasionally fails to enter the mode.What could be the potential causes for this failure?Any suggestions on how to approach debugging this would be greatly appreciated.Thanks. 

Hi,We are using STM32F091VCT6 in our application, however we are observing some instance of RTC losing time. We checked entire datasheet but were unable to figure out how much time the RTC takes to switch to VBAT after VDD falls below given threshold? Can you help us with the specification to rule out any issue related to timing here? In our case VBAT goes to a series diode and is than connected to the controller. Any more insight would be helpful 

Hello.I'm having issues with STM32CubeMX and VScode setup. I have the STM32 VScode extension installed and all the extras that were required as per this page ( https://marketplace.visualstudio.com/items?itemName=bmd.stm32-for-vscode ). I generate a make file for the blue pill based on the STM32F103C8T6 IC. When I open the code in VScode I immediately see errors starting with (main.h: No such file or directory 20 | #include "main.h")There are other errors starting with unknown type name 'RCC_OscInitTypeDef' | RCC_OscInitTypeDef RCC_OscInitStruct = {0};'RCC_CLOCKTYPE_HCLK' undeclared (first use in this function) | RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLKAny suggestions on how to set this up so these errors are permanently resolved?

Hello,I am using STM32H7 as SPI slave with DMA transfer, the communication works fine till 18MHz of clock frequency from the master side however for higher clock speeds of 20 MHz - 31MHz it is noted that the bit shifts by 1 bit for the whole stream of data.e.g if STM is sending 00100111 00010010 01101101 00000000 then in the master side the received bits are 00010011 10001001 00110110 10000000.The LSB of first byte shifts to MSB of 2nd byte thus corrupting the whole data. The target is to achieve maximum speed of 31 Mhz. Below I have provided my STM setup code for reference, moreover software NSS is used:  void SPI_Slave_Init(void) { /* SPI5 disable */ LL_SPI_Disable(SPI5); /* USER CODE BEGIN SPI5_Re_Init 0 */ /* USER CODE END SPI5_Re_Init 0 */ LL_SPI_InitTypeDef SPI_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; /* Peripheral clock enable */ LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERI

Hi all,I am working on a QSPI driver for W25Q512 flash memory (extloader for stm32cubeprogrammer and main firmware driver). I had a look at the errata ES0392 - Rev 13 and I have a question about paragraph 2.8.4: 2.8.4 - QUADSPI internal timing criticality --------------- Description The timing of some internal signals of the QUADSPI peripheral is critical. At certain conditions, this can lead to a general failure of the peripheral. As these conditions cannot be exactly determined, it is recommended to systematically apply the workaround as described. ... [omissis]   I have applied the suggested patch on the "external loader" driver and there is no particular problem in applying it,  but I have also the "very similar" driver on the main application firmware in processor.   Up to now I had no errors in the main firmware qspi driver : read and write are ok also without the patch.   Applying the patch on the "main firmware" needs testing and I have to schedule this te

 Hello,I am working with the STM32G0B1CCT6 MCU and facing an issue while flashing firmware using ST-LINK.During the flashing process, I get the following error:Error: Sector erase operation has failed at least for one of the existing specified sectors. Please verify flash memory protection. Warning: Connection to device 0x467 is lostI have checked my hardware connections, and power supply seems fine. However, the erase operation still fails, and the device disconnects.Could this be due to flash write protection, or some RDP (Readout Protection) setting?Please help me resolve this issue.I am attaching the screenshot of the error and the related project/file for reference.Thank you!

Are STM32F0 microcontrollers railway approved to use them when I'm designing rolling stock electronic component? or there is any certification regarding compliance with railway/rolling stock?

Hello,I came across this document here https://www.st.com/resource/en/application_note/dm00622045-stm32h7-series-lifetime-estimates-stmicroelectronics.pdfWe have a H75x custom board running the MCU in VOS1 at 400MHz with external 1.2V core power supply.According to this description hereAccording to Figure 2, when VOS1, VDD = 3.3 V, VCORE = 1.2 V and operation ratio of 100%. Some examples are illustrated such as: • Tj = 105°C the lifetime estimation is > 10 years • Tj = 125°C the lifetime estimation is 4 years • Tj = 140°C the lifetime estimation is 2 years In the same conditions and for an operation ratio of 20%, the lifetime estimation is as following: • Tj = 125°C the lifetime estimation is 20 years • Tj = 140°C the lifetime estimation is 10 yearsthe power consumption, heat dissipation and lifetime is influenced by "operation ratio". What does operation ratio mean and how can I influence/control it? Does this mean that only a part of chip silicon is powered/used? Or time spen

Greetings, I'm having an issue with low-power modes. I'm using a STM32U585 MCU and while in run mode it is consuming around 100mA, which is a lot. I tried to enter in Sleep, Stop and Standby modes right after the main declaration:int main(void) { HAL_Init(); SystemPower_Config(); SystemClock_Config(); PeriphCommonClock_Config(); HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI); ...The thing is, the current just drops from 100mA to 70mA, which is still a lot. Any clue why the circuit is consuming so much current? Thank you 

Hi , I am also making custom board for GPS, and same issue I am facing, unable to connect via SWD, Please help to debug.

Dear St,I hope this message finds you well.At our company, we are currently in the process of obtaining product certifications. To comply with these requirements, the certification body has requested RoHS documentation for the components we use, including your microcontrollers.Could you please provide us with the RoHS certificates for your microcontrollers or, if available, a general RoHS compliance declaration covering your product line?Thank you in advance for your assistance. Please let me know if you need any additional details from our side.Best regards,Manuel Ibáñez

I have some strange results when reading the configuration registers on the APS6408L-3OBMx.MCU: STM32H725IGK6Driver from https://github.com/STMicroelectronics/stm32-aps6408OCTOPSPI init code:static void MX_OCTOSPI2_Init(void) { /* USER CODE BEGIN OCTOSPI2_Init 0 */ /* USER CODE END OCTOSPI2_Init 0 */ OSPIM_CfgTypeDef sOspiManagerCfg = {0}; /* USER CODE BEGIN OCTOSPI2_Init 1 */ /* USER CODE END OCTOSPI2_Init 1 */ /* OCTOSPI2 parameter configuration*/ hospi2.Instance = OCTOSPI2; hospi2.Init.FifoThreshold = 4; hospi2.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE; hospi2.Init.MemoryType = HAL_OSPI_MEMTYPE_APMEMORY; hospi2.Init.DeviceSize = 23; hospi2.Init.ChipSelectHighTime = 1; hospi2.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE; hospi2.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0; hospi2.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED; hospi2.Init.ClockPrescaler = 2; hospi2.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE; hospi2.Init.DelayHoldQuarterCycle = HAL_OSPI_D