STM32 MCUs Products

Hello, so I was originally using printf with uart3, and that seemed to work fine. The characters were being printed as expected on a PuTTY terminal that I was using. I was using the following code:/* USER CODE BEGIN PV */ UART_HandleTypeDef *uartHandlerDebug = &huart3; // UART bank used for communication with computer for debugging /* USER CODE END PV */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ setvbuf(stdout, NULL, _IONBF, 0); //! Disables buffering for stdout HAL_Delay(1000); // Allow previous code to be erased /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_DMA_Init(); MX_USART3_UART_In

Setup: NUCLEO-H503RB with X-NUCLEO-IKS4A1, using STM32CubeIDE. To familiarize myself with I3C, I am playing around in this setup and have some source code which causes I3C interaction between the controller (Nucleo board) and two targets (daughter board). I have a logic analyzer attached. What I cannot get to work is the "direct RSTACT", i.e. configuring one of the two targets to reset itself. After everything has come up, I expect the targets' default reset action to be "1", i.e. I3C peripheral reset. After successful dynamic address assignment to both targets, I send a direct RSTACT (CCC 0x9A) to one target, configuring the reset action to be "0" (no reset), followed by the reset pattern. I would expect the other target to lose its dynamically assigned address and respond to a subsequent ENTDAA. But no one responds. Note that in my screenshots, the decoder is set to I2C rather than I3C (not supported) but it's still helpful. Tell target with dynamic address 70 to not reset when

Hello,I have a STM32H75x design and suffer from read errors in DDR timing, no matter if run at 50MHz or slower.It seems that the data hold time of 1ns the H7 is violated. The data output hold time of the SPI NOR MX25L12845 flash is 1ns, which seems to be too short for H7. Due to the fact, that the clock edge takes also ca. 0.5-1ns, the timing should be safe in my opinion. Nevertheless, a read failure arises if the drive strength of the flash is lower than 45Ohm and GPIO pin speed is higher than MEDIUM.The H7 evaluation boards are equipped with Micron flash with 1.5ns and it seems that this value is fine for H7.Therefore I doubt the data input hold time of 1ns@3.3V in table 181:In my opion, this value should be longer than 1ns. Any user experience?Thank you,Jochen 

Hi,I am currently using the following microcontroller (STM32F100C8T6B) in my design. I am using the STM32CubeIDE and I trying to build the project, but I am getting the following compiler errors from the "core_cm3.c" fileError: registers may not be the same -- strexb r3,r2,[r3]' Error: registers may not be the same -- strexh r3,r2,[r3]'Any help would be greatly appreciatedThanks,WJ This is the version for core_cm2.c/**************************************************************************//*** @file core_cm3.c* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Source File* @version V1.30* @date 30. October 2009** @note* Copyright (C) 2009 ARM Limited. All rights reserved. Below is where the error in the file/*** @brief STR Exclusive (8 bit)** @param value value to store* @param *addr address pointer* @return successful / failed** Exclusive STR command for 8 bit values*/uint32_t __STREXB(uint8_t value, uint8_t *addr){uint32_t result=0;// register uint32_t result asm ("r2");

Hello Experts,I'm using the STM32L476 in one of my projects, with the main system powered at 3.3V (VDD), and a 1.55V coin cell (Murata SR621SW) connected to VBAT for RTC backup.The tamper pin (PC13) is connected to a normally closed (NC) anti-tamper switch, which means the circuit is only open when the enclosure is physically closed. I've configured the tamper detection in level detection mode with the following settings: Sampling frequency: 1 Hz Precharge duration: 8 cycles External capacitor: 1.8 nF Trigger on: Low levelMy concern is about the behavior of the RTC and tamper detection circuitry during a power-down event — for instance, due to a brownout or complete power loss. I’ve set the Brown-Out Reset (BOR) level to Level 4.In such a scenario, when VDD drops and the RTC switches over to VBAT (1.55V), is there any risk of a false tamper detection being triggered because of the voltage transition? I want to make sure the switch from VDD to VBAT doesn't inadv

I've been getting some weird hard faults on an STM32U073RCT, which I've tracked down to the following conditions- In stop mode, waiting on an interrupt.- Debugging, with debug in stop mode enabled.- Interrupts are disabled.- An RTC interrupt occurs.When this happens, I get a hard fault a few instructions after the WFI - the exact distance seems to vary based on the instruction's offset. Single stepping though them does not cause a fault.I've attached a minimal cube ide demo project to replicate the issue. It requires a board with a crystal to run the RTC.Set two breakpoints, one at stm32u0xx_it.c:85 (for hard faults), one at main.c:126 (on success). Only the hard fault gets hit. Examining the stack shows the previous program counter was 0x8000248, which points to one of the NOPs.A few things I've found which avoid the issue, and hit the other breakpoint:- Uncomment the "DBGMCU->CR = 0" line - assuming your debugger doesn't time out- Commenting out setting sleep deep- Commenting out

Do I understand the datasheet correctly when I believe the internal 2.1v reference is something internal, and the AD is still operating within VCC/3.3v as upper limit? Copilot suggested this:  // Enable ADC1 and configure itRCC->APB2ENR |= RCC_APB2ENR_ADC1EN; // Enable ADC1 clockADC1->CR2 |= ADC_CR2_ADON; // Turn on ADC1// Configure ADC1 to use the internal reference voltage (1.2V)ADC1->CR2 |= ADC_CR2_TSVREFE; // Enable internal reference voltageADC1->SMPR2 |= ADC_SMPR2_SMP0; // Set sample time for channel 0 (PA0)// Calibrate ADC1ADC1->CR2 |= ADC_CR2_CAL; // Start calibrationwhile (ADC1->CR2 & ADC_CR2_CAL); // Wait for calibration to complete Calibrate/wait for calibration ? - do I actually use the internal VREF, and the max input is corrected for up to 3.3v ?

Hi,I am experiencing a packet loss issue using Peripheral-to-Peripheral DMA between UARTs.While Peripheral-to-Peripheral configuration is referenced in the STM32U585's Reference Manual, it is not available in the HAL library. Therefore, the DMA is configured for Peripheral-to-Memory mode, with the destination address set to the UART's Transmit Data Register (TDR). FIFO mode is not used.The reference setup I am using is based on the B-U585I-IOT02A, where no packet loss occurs.(MSI Clock)USART2_RX → USART3_TXUSART3_RX → USART2_TXThe packet loss issue occurs on another STM32U5 (u585cit6q) with the same software but different UART configurations. (HSE Clock)USART3_RX to UART4_TXUART4_RX to USART3_TXUSART3 is configured to use the RS485 protocol.The packet loss varies between 0.0025% and 10%, depending on the baud rate, and it is not correlated to an increase in speed.Is it possible to experience synchronization issues between USART and UART? Can the addition of the RS85 be the so

Hello, I use an external flash in memory mapping mode and I have a strange problem. The application is executed from the internal RAM, while the checksum is calculated on the data from the external flash (simple summing of successive bytes in a loop). Interestingly, sometimes I get an incorrect result, i.e. the sum is a bit smaller, e.g. instead of 3233257 it is 3233225 as if one byte had not been counted. Interestingly, later the program jumps to the application that is executed from the external flash and it works normally (does not crash). I tried to turn off D-Cache but it does not help. Since the program from the flash executes correctly, I assume that it is not a problem with the memory configuration. What could it be?EDIT:I will add that the memory is configured using the ExternalMemory manager. I added a second identical image in flash memory in a different location and for which I calculate the checksum simultaneously and interestingly for both the same problem occurs alternat

Hello,I have a question regarding VBUS sensing on STM32N6.First off, I found theGuide to USB development resources on STM32https://community.st.com/t5/stm32-mcus/guide-to-usb-development-resources-on-stm32/ta-p/790803I also read AN 4879. I want to use OTG1 of my MCU to establish a USB connection to my PC. The MCU is a self-powered device.Since it's a self-powered device, VBUS sensing becomes mandatory.In all ressources it is written that PA9 (or PB13) are used for VBUS sensing and are 5V tolerant. However, on the STM32N6, it seems that:- PA9 is not 5V tolerant- there is no mentioning of VBUS sensing functionality to this pin. The datasheet returns nothing if I search for VBUS.The Ref Manual 0486,Rev2 has a chapter 72.2.6 about VBUS detection but it doesn't help me much. But page 3750 states the following:If needed, VBUS detection must be managed by an ADC channel or an externalcomparator. It cannot be managed by OTGPHY1 since it is forced in external comparator mode

The configuration:STLINK-V3SETConnected the two PCBs together via the three connectors (page 11).Attached jumper JP7 CAN_ON on MB1440 PCB (page 18).(STLINK-V3SET pages 17 & 23) & (NUCLEO-H723ZG page 37) & (Bootloader AN page 199) & (STM32H723 Manual page 143):Connected the T_CAN_VCC to 5V of NUCLEO-H723ZG; tried also the 3V3, same outcome.Connected the T_CAN_TX to the PD0 CAN1_RX pin 29 of CN9 connector of NUCLEO-H723ZG.Connected the T_CAN_RX to the PD1 CAN1_TX pin 29 of CN9 connector of NUCLEO-H723ZG.Reversed the PD0 and PD1, same outcome.NUCLEO-H723ZGConnected the boot0 pin to 3V3.Power cycled the Nucleo and verified that the bootloader is running and communicating via USB with the latest Cube Programmer.Power cycled the Nucleo and attempted to connect via CANBus. The Nucleo does not respond. The Cube Programmer reports a connection error message (similar to this). I have attached a logic analyser to the T_CAN_TX, CAN1_RX, T_CAN_RX and PD1 CAN1_TX and I see

Hi I am testing the Nucleo-L433RC-P board with a BlueNRG-2 BLE interface. I configured the setup, but the BLE device is not being detected in the ST BLE app. Look at pic, Any modifications require are not ?   

Hello,We are using the STM32N6 series MCU in our project and encountering issues during debugging. I’ve attached a screenshot of the error message we are seeing.We followed the steps outlined in this guide:https://community.st.com/t5/stm32-mcus/how-to-debug-stm32n6-using-stm32cubeide/ta-p/800547However, the code cannot be debugged from external flash (in dev boot mode).But, when we boot from flash (flash boot) and the debugger is not connected, the code runs as expected.Also, debugging from RAM with FSB works, but debugging the App code from RAM fails and gives the same error.Based on the information in this page:https://wiki.stmicroelectronics.cn/stm32mcu/wiki/Category:Security_with_STM32N6,could this issue be related to the STM32N6's debug security features?Best regards,Egemen Aksoy

Hello,I am implementing a sine wave generator based on the high-speed DAC3 of the G474.The DAC is in double-DMA mode and its conversions are triggered periodically  by a timer.Sample and Hold is disabled.The DAC is connected to an external pin by an OPAMP in the follower mode.What could be the reason for the downward slope shown on the picture? It is consistent even at low conversion speeds.Thank you for your help. 

Hello everyone on the forum.I have created a UART DMA receive program with Nucle-H723.This time it is working properly, but sometimes it does not work properly.DMA set up in normal mode on UART4 RX.DMA initialization function of UART.void UART_DMA_Init(UART_HandleTypeDef *huart) { UART_HandleTypeDef *pHuart = huart; memset(RxBuf, 0, UART_BUF_LEN); __HAL_UART_DISABLE_IT(pHuart, UART_IT_PE); __HAL_UART_DISABLE_IT(pHuart, UART_IT_ERR); __HAL_UART_ENABLE_IT(pHuart, UART_IT_IDLE); HAL_UART_Receive_DMA(pHuart, RxBuf, UART_BUF_LEN); }UART DMA receive processing function.void UART_DMA_EventHandler(UART_HandleTypeDef *huart) { UART_HandleTypeDef *pHuart = huart; uint8_t RxData[UART_BUF_LEN]; if(__HAL_UART_GET_FLAG(pHuart, UART_FLAG_IDLE) != RESET) { __HAL_UART_CLEAR_IDLEFLAG(pHuart); HAL_UART_DMAStop(pHuart); uint8_t RxBufLen = __HAL_DMA_GET_COUNTER(pHuart->hdmarx); RxBufLen = UART_BUF_LEN - RxBufLen; RxBufLen = RxBufLen % UART_BUF_LEN; if(RxBufLen > 0) { me

Hi.I am currently developing a motor control platform using STM32G441 and am facing a problem.I am controlling a 3-phase motor with TIM1 based on packets from Half duplex USART1 (PB6), but when I Start TIM1 CH2, the USART1_TX pin, which should be unrelated, is pulled down to low level.Specifically, PB6 is pulled down by executing HAL_TIM_PWM_Start_(&htim1, channel2) or by setting the AF register and MOE register (output enabled).This occurs only on CH2 and is not reproduced on TIMx CH2 (inverted) or other channels.No short circuit in the board pattern is observed.In half-duplex, pull-down to low level during Idle section is a fatal problem.I have investigated using an oscilloscope, and it behaves as if the TIM1 CH2 pulse is shorted in the MCU with some resistance.Is this problem an errata of the STM32G441?Thank you.

 Hi everyone,I’m currently working with the STM32N6570-DK board and trying to read an analog signal using the  ADC1/2 INP8 channel (PB10) using the MB1280C Fanout board (Pin 13) with STMOD+ connector. However, I'm consistently getting a value around 2000 (high impedance value), regardless of whether I connect the pin to GND or a 1.8V source.For reference, I’ve used similar code on the STM32F441-RE board where it works perfectly, so I suspect this might be related to board-specific settings.Steps to Reproduce:Create a default STM32N6570-DK project using STM32CubeIDE.Set PB10 to ADC2_INP8 mode in the .ioc file.Keep the ADC settings at their default configuration (12-bit resolution).Add UART print statements to output the ADC values over the COM port (as shown in my main.c file).Observe that the ADC value remains around 2000, regardless of the input voltage on PB10 or Pin 13 on the fanout board connected to STMOD+ connector.I’m attaching my full project for reference. 

I'm running into an issue on two boards (an STM32H735 Discovery Kit) and a custom board with an H743. #include <stdio.h> #include <zephyr/kernel.h> int main(void) { while (1) { printf("Hello there, world!\n"); k_msleep(1000); } return 0; }If I flash the program, it runs fine. If I start debugging it, it SIGTRAPs at 0xA05F0000 inside the k_msleep() (around sys_clock_tick_get_32()). Even though my debugger says the program is stopped, it continues running doing the printf() and waiting the 1 second in each loop. I'm using VSCode with the Zephyr IDE plugin on a mac - using either stm32cubeprogrammer or OpenOCD as my runner. I'm connected to my custom board with an STLinkV3. I'm using the inbuild STLink on the Discovery Kit board.I've googled and see a few references to 0xA05F0000 with similar bugs, but nothing that's a definitive answer. Does that address mean anything to anyone? 

Hello everyone, I’m using an STM32L412K8 microcontroller with an external 32.768 kHz LSE crystal to operate the RTC for real-time clock functionality. However, I'm facing two issues: Second jumps: the seconds skip multiple values out of order (for example, jumping from second 9 to second 16). It consistently jumps by 7 seconds every 10 seconds. The attached image shows some of these jumps. Irregular seconds counter: The seconds count exceeds the normal range, reaching values above 60 (for example, 89) before rolling over to the next minute, as shown in the attached images.What are the possible solutions I can try?, Any tips or suggestions would be very helpful.Thank you in advance! 

Hello.I am finishing a project where I measure voltage with an ADC using the STM32L431 and, for greater accuracy, I am using the OPAMP (PA0 = ADC1_IN0_VINP and PA3 = ADC1_IN_VOUT). For the STM32L431 on the STM32CubeMX, when activating the OPAMP in "Follower" mode, it is possible to select the "OPAMP1 Output Single-ended" option on the ADC1 to internally connect the OPAMP1_VOUT to the ADC1_IN8, and I can read it perfectly on the PA3 (ADC1_IN8). Knowing more about the ST family of microcontrollers, I realized that the STM32U545 has more features in terms of safety and lower power consumption, so I decided to change the microcontroller of the project and start using the STM32U545. However, on the STM32U545, when activating the OPAMP in "Follower" mode or any other mode, the ADC options do not show the "OPAMP1 Output Single-ended" option and, so far, I have not found out what to do to be able to use the OPAMP and read PA3=ADC1_IN8 as I do on the STM32L431.I have already looked in several m

MCU:        STM32H753XIH Tool:         STM32CubeIDE v1.18.1 FW Pkg:   FW_H7_V1.12.1   I have an in-house designed board that has an FPGA connected to the FMC bus. The FPGA uses a simple SRAM interface with Address (7:0), Data (31:0), Chip Select, Read and Write signals. The FPGA has 8 internal 32 bit registers with an address decoder and provides the 8 internal chip selects for these registers from the address bus. I hard Fault every time I attempt to access the FPGA registers. FMC Setup: hsram1.Instance = FMC_NORSRAM_DEVICE; hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE; /* hsram1.Init */ hsram1.Init.NSBank = FMC_NORSRAM_BANK1; hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE; hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM; hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_32; hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE; hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;

Any step-by-step guide on how to configure STM32CubeIDE to redirect `printf()` output to a virtual COM port using UART (serial communication), and then monitor that output using the STM32CubeIDE’s built-in Terminal view?  I'm using a Nucleo-F411Re on Windows 10 machine. 

Hello everyoneI am a begineer with stm32 MCUs. I studied through  youtube videos and datasheets that we can program STM32H750 using STlink V3 and to do so the MCU should be put into bootloader first. To do so the boot pin must be pulled low for which dev boards have a button that we can press at power up or reset.I don't want to use the button in my custom hardware design. I want the boot pin to be pulled low by the programmer (ST link v3) or atleast be piulled low automatically. I want to use tag connectors to programe my boards.How can I automatically put STM32H750 into flash mode (boot pin pulled down) when STlink is connected.Thanks for your help. 

Hello World;My Setup:Nucleo F767ZI BoardBOOT0 pulled highSCL/SDA on PB6/PB9 connected to Raspberry Pi I2C-1 and Saleae Logic Pro 8Nucleo board powered via USB from Raspberry PiGoal: Using ROM Bootloader over I2C for firmware updates (later on custom hardware)Problem: I2C hangs after issuing Mass Erase command     Send: 0x45 0xBA Erase-NS CommandReceive: 0x79 ACKSend 0xff 0xff 0x00 Special EraseReceive for ACK or NAK hangs while sending the I2C device address.AN4221 says "Some products do not support the mass erase feature." Does STM32F767 support mass erase?  

Hello,I’m working on a custom board based on the STM32H753IITx and I'm trying to access a microSD card via USB_OTG_HS using the USB Mass Storage Class (MSC). I've read this post, which is close to my use case, but unfortunately, I haven’t been able to solve my issue.Here is a summary of my configuration in STM32CubeMX:SDMMC1 (SD card interface):Mode: SD 4-bit wide busClock transition: Rising edgeClock output when idle: Enabled (Power save disabled)Hardware flow control: DisabledClock divide factor: 1 (which results in 200 MHz / (2 × 1) = 100 MHz SDMMC_CK)External transceiver: Not presentAll GPIOs maximum output speed to Very HighAll GPIOs except SDMMC1_CK have pull-upUSB_OTG_HS (Mass Storage Device):PHY: External PHY (ULPI), Device_OnlySpeed: High Speed (480 Mbit/s)IP DMA: DisabledPower management features: All disabledVBUS sensing: DisabledUSB Class: Mass Storage ClassMSC_MEDIA_PACKET size: 512 bytesUSBD_SELF_POWERED: EnabledLPM (Link Power Management): EnabledAll GPIOs maximum output