STM32 MPUs

Hi,I try to compile "OpenAMP_TTY_echo_CM33_NonSecure" sample program as suggested here:https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP2_boards/STM32MP257x-DK/Develop_on_Arm_Cortex-M33/Modify,_rebuild_and_reload_the_firmwareCompiling does not work, I get error message: 0:43:14 **** Build of configuration CA35TDCID_m33_ns_sign for project OpenAMP_TTY_echo_CM33_NonSecure ****make -j16 all cmake -S ../../../../../../../../../Middlewares/Third_Party/OpenAMP/libmetal/ -B libmetal -G"Unix Makefiles" -DCMAKE_TOOLCHAIN_FILE=cmake/platforms/stm32mp-generic-gcc.cmakeCMake Error at CMakeLists.txt:1 (cmake_minimum_required):-- Configuring incomplete, errors occurred!Compatibility with CMake < 3.5 has been removed from CMake. Update the VERSION argument <min> value. Or, use the <min>...<max> syntaxto tell CMake that the project requires at least <min> but has been updatedto work with policies introduced by <max> or earlier. Or, add -DCMAKE_PO

Dear Sir/Mam We are encountering an issue with writing values into channels 0–7 of the RCC_XBARxCFGR register at the address offset 0x1018 + 0x4 * x (where x = 0 to 63).We have also observed that Writing to other channels (x = 8 to 63) works as expected and Attempts to write into RCC_XBARxCFGR(0 to 7) result in the debug control exiting and generating an error. Thanks & RegardsAkshitha Pattem

quote from hardware development application note -"VDD3V3_USBHS must not be present unless VDDA1V8_REG is present, otherwise permanentSTM32MP15x lines damage can occur. It must be ensured by PMIC ranking order or withexternal component in case of discrete component power-supply implementation."this seems to contradict that (another quote) - "VDD3V3_USBFS is used to supply OTG_VBUS and OTG_ID (PA10) pins. Therefore,VDD3V3_USBFS must be supplied as well when USB high-speed dual-role-port or USBhigh-speed device is used. If not used, it must be connected to VDD."along with quote - "VDD_DSI, VDD_PLL and VDD_ANA must be connected to VDD" so essentially VDD= VDD_DSI = VDD3V3_USBFS = VDD3V3_USBHS Then VDD3V3_USBHS  WILL be 3.3V before VDDA1V8_REG is 1.8V will it not? what i am essentially asking about is whether or not i can avoid having to use a whole other buck converter just to be able to supply VDD3V3_USBHS later after VDDA1V8_REG has reached 1.8V

Dear sir/mam,  We are currently working on generating interrupts for USB functionality. As per the Reference Manual RM0457: STM32MP2325xx Advanced ARM-Based 32/64-bit MPUs, it is specified that the GIC interrupt number for USB_EHCI is 171.However, we are encountering an issue where the interrupt remains continuously active without being cleared after writing 171 to the relevant registers. Interestingly, when writing any interrupt number other than 171, the interrupt is cleared as expected.  Best Regards,akshithap

Hi st team,I tried to used Qtmultimedia with PyQt5 i clone in layers meta-qt5 and meta-st in meta-st i used meta-st-x-linux-qt and completed build.Build Configuration:BB_VERSION = "2.4.0"BUILD_SYS = "x86_64-linux"NATIVELSBSTRING = "universal"TARGET_SYS = "aarch64-ostl-linux"MACHINE = "stm32mp2"DISTRO = "openstlinux-weston"DISTRO_VERSION = "4.2.4-snapshot-20250529"TUNE_FEATURES = "aarch64 armv8a crc cortexa35"TARGET_FPU = ""DISTRO_CODENAME = "mickledore"ACCEPT_EULA_stm32mp2 = "1"GCCVERSION = "12.%"PREFERRED_PROVIDER_virtual/kernel = "linux-stm32mp"meta-pythonmeta-oemeta-gnomemeta-multimediameta-networkingmeta-webserver = "HEAD:aa5e8edabbc414d8ec1b2ad63c8743c7baf99626"meta-st-stm32mp = "HEAD:890071a6ae935663883a9978582b6916e293890a"meta-st-openstlinux = "HEAD:4d6bdd08c0925912dfdacca0034f2ee87fe01908"meta = "HEAD:23b5141400b2c676c806df3308f023f7c04e34e0"meta-qt5 = "mickledore:d86e2e82c15d186141713515dfd1373013aaebd5"meta-st-x-linux-qt = "v1.0.0:1e51cb49240116fb512deccd8f6bad551918f86

 Dear all,In the STM32MP135 series reference manual, the following is stated about the CRYP module:• Compliant implementation of the following standards:  – NIST FIPS publication 46-3, Data Encryption Standard (DES)  – ANSI X9.52, Triple Data Encryption Algorithm Modes of Operation  – NIST FIPS publication 197, Advanced Encryption Standard (AES)Have these implementations been certified by any third party laboratory, and is it possible to obtain the necessary evidence to ensure the certification of a product using this module?Thank you very much and best regards

Platform:Yocto version: openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06Machine: stm32mp1Build environment: Ubuntu 22.04Target image: st-image-weston Summary:I'm attempting to integrate PyQt5 into the latest ST OpenSTLinux (Scarthgap-based) BSP. While the build proceeds fine up to qtbase, the compilation fails when reaching python3-pyqt5, due to a LONG_BIT platform-related error. Steps Followed:1. repo init -u https://github.com/STMicroelectronics/oe-manifest.git -b refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v24.11.062. repo sync3. git clone https://github.com/meta-qt5/meta-qt5.git -b scarthgap ( copied into layers folder)4.DISTRO=openstlinux-weston MACHINE=stm32mp1 source layers/meta-st/scripts/envsetup.sh5. bitbake-layers add-layer layers/meta-openembedded/meta-python6. bitbake-layers add-layer layers/meta-qt57. Added IMAGE_INSTALL:append = " python3-pyqt5" in  conf/local.conf8. bitbake st-image-weston local.conf Additions:# GPU / Qt5 related configDISTRO_FEA

Hi there,I am in the process of creating a custom machine for the STM32MP257F-DK board following this Wiki guide. After following the necessary steps, I can successfully bitbake st-image-weston with my CubeMX-generated device tree files.I am hitting an issue where updates to my device tree source (within the mx/ directory in the meta-st-stm32mp-addons layer) are typically not reflected in the output image. As a simple test, I am changing the model name then running bitbake st-image-weston. It looks as if bitbake does carry out some recompile/configure of linux-stm32mp but after updating the board (using the flash-layout-x-.tsv). The model name change is not reflected.This sounds similar to an issue mentioned in this post. As suggested, I have confirmed the #@NAME: variable reflects my custom machine name and have tried forcing a rebuild with:bitbake linux-stm32mp -c cleanallbitbake linux-stm32mpbitbake st-image-weston Very occasionally, changes to the kernel dts have bee

The DSI can be transformed to HDMI using the ADV7535BCBZ chip. My question is: Will I be able to see the boot screen at startup directly when the HDMI is plugged in and Linux is booting? Or must Linux start the DSI later after the booting process?This is for the STM32MP257FAK. 

hello, i have an issue trying to install QT expansion  package on stm32MP257F-DK2 with openstlinux starter package provided with the board.i am using instructions from:https://wiki.st.com/stm32mpu/wiki/X-LINUX-QT_Expansion_Package#Software_setupwget http://extra.packages.openstlinux.st.com/Qt/5.1/pool/config/a/apt-openstlinux-x-linux-qt/apt-openstlinux-x-linux-qt_1.0_all.debwget is okbut   "apt-get install ./apt-openstlinux-x-linux-qt_1.0_all.deb" gives an error:Note, selecting 'apt-openstlinux-x-linux-qt' instead of './apt-openstlinux-x-linux-qt_1.0_all.deb'Some packages could not be installed. This may mean that you haverequested an impossible situation or if you are using the unstabledistribution that some required packages have not yet been createdor been moved out of Incoming.The following information may help to resolve the situation:The following packages have unmet dependencies:apt-openstlinux-x-linux-qt : Depends: apt-openstlinux (< 5.2) but 6.0-r0 is to be i

Hi all,I would like to ask for your support regarding an issue I’m facing when trying to bring up a 24-bit RGB panel using the LTDC interface.When using an LVDS panel, the display works correctly and powers on as expected. However, when switching to an RGB panel, I’m unable to get any display output — the screen remains blank.I have already disabled the LVDS configuration when switching to RGB, but it had no effect.Additionally, I’ve tried adjusting the CK_KER_LTDC (MHz) setting in the Clock Configuration.When I check clk_summary, I can confirm that the LTDC clock has been updated. However, this change causes the backlight to turn off, and the system is unable to detect the panel.Even after modifying the clock-frequency property in the Device Tree for the LTDC node, the change does not take effect.Moreover, these clock changes appear to interfere with I2S audio playback via aplay — audio becomes unstable or stops working entirely.Could you please advise how I might resolve this issue o

We have developed a board in which STM32MP151FAD1 or STM32MP157FAD1 is being used. I know that STM32MP15x has two device revisions, B and Z. Either STM32MP151FAD1 or STM32MP157FAD1 on the board has device revision Z, which does not have eMMC boot problem that device revision B has. Now we are going to purchase some STM32MP153FAD1 chips, but we are not sure if the chips are revision B or revision Z. The chip distributor won't provide any information about the chip's revision. Does STM32MP153FAD1 also have revision B and revision Z?

Moved from this thread. Hello @mƎALLEm  I'm facing this issue on CubeMX 6.14.1. Project for STM32MP157FACx (STM32MP1 series package) v 1.7.0.  

Hi,I am trying to configure the STM32MP257FAI3 device in STM32CubeIDE, but I’m encountering the following error:"The target device 'STM32MP257FAIx' is currently not supported by STM32CubeIDE."Could you please advise on how to proceed or if there is a planned update to support this device in the IDE?Looking forward to your guidance. Thank you

Hello,I plan to use a MP2 on a SOM module (probably something like the KaRo QFN-like QSMP2 module).This MP will run a linux on the A35 core and real-time software on the M33, + USB2, ETH 100 Mbps.I need 11 ADC channels to convert analog signals at 500kSPS. There is enough ADC input to do that at the required sample rate but what about noise ?The datasheet claims ~9.3bits of ENOB, this the enough BUT I suppose that obviously, this is in the best case.Activating LPDDR4 + USB2 + ETH will generate a lot of board noise and will probably degrade the ADC ENOB. But how much ?Does anyone experienced some noise measurement on MP1/MP2 device with DDR and hi-speed IF activated ?Thanks for the feedback !

How can I enable a timer as a counter in the device tree? When checking the status using cat, the result shows 'OK', and a counter device file is created in /dev, but no corresponding counter entry appears in sysfs.

how to configure the general purpose TImers and External gpio interrupt in stm32MP257f -ev1

Hello,I'm trying compiling OpenSTLinux 6.6 for STM32MP257-EV1 using developer package + X-LINUX-RT expansion package. I've followed X-LINUX-RT expansion package guide at par. 7.2 and compiled linux kernel and optee successfully.Now I'm trying to compile u-boot but the process stops with following errors: LD u-boot OBJCOPY u-boot.srec OBJCOPY u-boot-nodtb.bin RELOC u-boot-nodtb.bin make[4]: *** No rule to make target 'arch/arm/dts/stm32mp257f-ev1-rt.dtb', needed by 'dtbs'. Stop. make[3]: *** [/home/marco/MP257_Ecosystem6/en.SOURCES-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06_X-LINUX-RT/stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06/sources/aarch64-ostl-linux/u-boot-stm32mp-v2023.10-stm32mp-r1-r0/u-boot-stm32mp-v2023.10-stm32mp-r1/dts/Makefile:44: arch-dtbs] Error 2 make[2]: *** [/home/marco/MP257_Ecosystem6/en.SOURCES-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06_X-LINUX-RT/stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06/sources/

Hi everyone,recently we have developed a custom board based on stm32mp157 mpu. We have used openstlinux distribution and the branch is "kirkstone". Ethernet is working perfectly on the Linux kernel. But problem arises when I am in the uboot mode (We want to have access to the ethernet from uboot). First, the ethernet can not find the mac address. It shows the following Error:  invalid MAC address 0 in OTP 00:00:00:00:00:00 Error: ethernet@5800a000 address not set. No ethernet found.  The I set the ethernet mac address using the "setenv" command and then I enter dhcp command to test the ethernet connection, it shows the following error:  EQOS_DMA_MODE_SWR stuck FAILED: -110 in stm32mp157 for u-boot  I have the following configuration for the ethernet in uboot device tree.  &ethernet0{ pinctrl-names = "default", "sleep"; pinctrl-0 = <&eth1_pins_mx>; pinctrl-1 = <&eth1_sleep_pins_mx>; status ="okay"; /* USER

Hi there,I update the device tree of usart6 of STM32MP257F-DK as below but do not know if it was enabled during kernel.Is it ttySTM0 or ttySTM1 or did not enable and how to check? &usart6 {pinctrl-names = "default", "idle", "sleep";pinctrl-0 = <&usart6_pins_a>;pinctrl-1 = <&usart6_idle_pins_a>;pinctrl-2 = <&usart6_sleep_pins_a>;uart-has-rtscts;status = "okay";}

Would this mean that in a few years time  STM32MP151, STM32MP231 and STM3MP251 wont be supported anymore by Linux when STLink kernel goes to 6.17 or beyond or this won't apply to non-Intel processors ?https://www.phoronix.com/news/Linux-6.17-Maybe-SMP-Uncondhttps://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?h=sched/core&id=cac5cefbade90ff0bb0b393d301fa3b5234cf056   

Moved from MCUs form - STM32MP are MPUs, not MCUs.NOTICE: CPU: STM32MP157FAC Rev.ZNOTICE: Model: STMicroelectronics STM32MP157F-DK2 Discovery BoardNOTICE: Board: MB1272 Var4.0 Rev.C-02NOTICE: Bootrom authentication failedINFO: Reset reason (0x15):INFO: Power-on Reset (rst_por)INFO: FCONF: Reading TB_FW firmware configuration file from: 0x2ffdd000INFO: FCONF: Reading firmware configuration information for: cot_descINFO: FCONF: Reading firmware configuration information for: tbbrINFO: FCONF: Reading firmware configuration information for: stm32mp_ioINFO: Using SDMMCINFO: Instance 1INFO: Boot used partition fsbl1NOTICE: BL2: v2.6-stm32mp1-r2.1(release):v2.6-dirty(a1f02f4f)NOTICE: BL2: Built : 13:14:26, Nov 23 2021NOTICE: TRUSTED_BOARD_BOOT support enabledINFO: Using crypto library 'stm32_crypto_lib'INFO: BL2: Doing platform setupINFO: RAM: DDR3-DDR3L 16bits 533000kHzINFO: Memory size = 0x20000000 (512 MB)INFO: BL2: Loading image id 1INFO: Loading image id=17 at address 0x2ffff000INFO: Ima

Dear STMicroelectronics Support Team,I am currently working with the STM32C011F6 microcontroller and attempting to enter the built-in system bootloader via software from my application. My goal is to flash the device over I²C from an external processor (RFSoC running Linux), without toggling the BOOT0 or RESET pins.I followed the STM32 application notes AN2606 and AN4221 closely and implemented the bootloader jump using the standard approach:1. Disabling all interrupts (NVIC->ICER / ICPR)2. De-initializing peripherals (HAL_DeInit, HAL_RCC_DeInit)3. Stopping SysTick4. Setting the MSP from address 0x1FFF00005. Jumping to the bootloader reset handler at 0x1FFF0004From the external I²C master, I send the `0x7F` SYNC byte, and I **consistently receive a NACK (0x1F)** instead of the expected ACK (0x79). I confirmed the I²C lines (PA9 and PA10), 100kHz speed, correct pull-ups, and that the STM32 is not held in reset or debug mode. I also verified that the bootloader jump function is being

Hello We are trying to boot BareMetal application using Sd-card on STM32MP257F-DK Board. We have a few questions regarding this:1.In SD-Card Boot mode what is LOAD ADDRESS of image?2.At this address will it load only application or application with header?3.At entry point will it start executing the code or will it expect the vector table Thanks and regardsAkshitha Pattem

I have a STM32MP135 with a M24C64 64k bit I2C EEPROM. The EEPROM is divided into NVMEM cells, which can be written and read back via nodes in /sys/bus/nvmem/devices/... (NVMEM subsystem).The NVMEM cells do not behave in the same way as files: The length always corresponds to the size of the cell and the cell is always present (even if it has not yet been initialised).For certain applications it would be an advantage if the NVMEM cells behaved in the same way as a file.We could emulate the behaviour of a file by starting each NVMEM cell with a 12 byte header (4 byte magic, 4 byte size, 4 byte CRC):* if there is no magic, the ‘file’ does not exist.* the length information stores how many bytes have actually been written. This is also displayed as the file size.* a CRC secures the payloadThis principle corresponds to the u-boot-env layout (see https://github.com/torvalds/linux/blob/master/drivers/nvmem/layouts/u-boot-env.c)Unfortunately, the problem cannot be solved using the NVMEM API al