STM32 MPUs Products and hardware related

I'm having trouble setting up a hdmi monitor with a usb touchscreen on the stm32mp157. In the command lsusb it appears, but I can't link it with X11. What is the correct process for configuring the USB touchscreen on this board? I managed to make it work on a raspberry pi4.

I am working on the STM32MP157A. Setting PLL in the STM32CubeIDE does not work as expected. 24 MHz HSE DIVM4 = /5 DIVN4 = X84 DIVQ4 = /5 should = 80,460,000 . The MX program says 80,960,039. I do not understand. If the MX program is right, then what is the equation? I am trying to find the right combination to exactly get 460800 baud to work. The numbers I used should have worked.

Hi Team,Please help on DMA driver part of STM32MP157 DK eval board and also the base address for DMA .RegardsSS

Hi ST.I set the clock in the dts file as below.&rcc { st,hsi-cal; st,csi-cal; st,cal-sec = <60>; st,clksrc = < CLK_MPU_PLL1P CLK_AXI_PLL2P CLK_MCU_PLL3P CLK_PLL12_HSE CLK_PLL3_HSE CLK_PLL4_HSE CLK_RTC_LSE CLK_MCO1_DISABLED CLK_MCO2_DISABLED >; st,clkdiv = < 1 /*MPU*/ 0 /*AXI*/ 0 /*MCU*/ 1 /*APB1*/ 1 /*APB2*/ 1 /*APB3*/ 1 /*APB4*/ 2 /*APB5*/ 23 /*RTC*/ 0 /*MCO1*/ 0 /*MCO2*/ >; st,pkcs = < CLK_CKPER_HSI CLK_QSPI_ACLK CLK_ETH_DISABLED CLK_SDMMC12_PLL4P CLK_STGEN_HSE CLK_USBPHY_HSE CLK_SPI2S1_CKPER CLK_SPI2S23_PLL3Q CLK_SPI45_PLL4Q CLK_SPI6_DISABLED CLK_I2C46_HSI CLK_SDMMC3_DISABLED CLK_USBO_USBPHY CLK_ADC_PLL4R CLK_CEC_DISAB

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Hello, I am working on the stm32mp157-dk1. I would like to create a 32bits parallel bus on cortex A7, at a frequency greater than 20Mhz but when I do a test on a pin I get a max frequency of 120khz, which is too low. I think this is the wrong program.Can anyone help meHere is my code // SPDX-License-Identifier: GPL-2.0-only/* * gpio-hammer - example swiss army knife to shake GPIO lines on a system * * Copyright (C) 2016 Linus Walleij * * Usage: *           gpio-hammer -n <device-name> -o <offset1> -o <offset2> */#include <unistd.h>#include <stdlib.h>#include <stdbool.h>#include <stdio.h>#include <dirent.h>#include <errno.h>#include <string.h>#include <poll.h>

Hi,iam a bit confused aboute the remoteproc framework and if my understanding of it is correct.In my view, the remoteproc framework can start the m3 firmware with having its elf-file in a dedicated place of the filesystem. The remoteproc also parses the resource table of the m3 and allocates the memory which is specified for the vrings etc, that a communication can be established in a shared memory. But i have few problems with understanding the stop and shutdown commando from remoteproc. Are those commands just associated with the stm32_rproc driver. What happens with the m3 when i call the remoteproc stop and shutdown. Does the stm32_rpoc driver just shutdown the clocks and voltages for the m3. And how it can resume them without loading the elf file again? Does it just trigger an wake-up source if i wanna have th m3 active via the command start again and it resumes the code in the elf file?

Hy wanted to make a kernel Module and i wanted to know whats the best way to acces the uart from Kernel Space.So far i enabled the UART in the device try and now i am able to send data. But now i know since the uart us in userspace i cant access it fom the kernel space. My questen is what is a common solution for this problem. An example code would also be helpfull.

Hi everybody,I have generated an STM32 project via the STM32CubeIDE and modified the large example buffer (the firmware logic analyzer part), trying to substitute to the timer generated DMA transfer a second stream from SRAM to SRAM.In the next future I would like to attach a memory to the FMC bus (M4 side) and use DMA to transfer from that memory into the SRAM, and from the SRAM into the DDR. In the meantime I would like to simulate that using an SRAM to SRAM transfer.I try to run the attached code (main.c), but the first DMA transfer from SRAM to SRAM when I start the request in function StateMachine() through an 'S' command (HAL_DMA_Start_IT()) seems to hang. I see the "before" log at line 302, but not the "after" at line 315.I cannot manage to attach to the M4 core when running using the integrated debugger, and the STM32CubeProgrammer says that reading registers is not supported yet for STM32MP1. I had some years ago experience

Hello ST Community,I am starting to work with the STM32MP157C-EV1 board and working through the example https://wiki.st.com/stm32mpu/wiki/Getting_started/STM32MP1_boards/STM32MP157x-EV1/Let%27s_start/Populate_the_target_and_boot_the_image.While flashing with STMCubeProgrammer (v 2.6.0) the "FlashLayout_sdcard_stm32mp157c-ev1-trusted.tsv" to the SD Card (SanDisk 16Gb), I get an error "TSV Flashing servie failed", "Download partition 0x21 failed". On another try, it failed later during partition 0x23.I set the "Binaries path" to "*/Starter-Package/stm32mp1-openstlinux-5-4-dunfell-mp1-20-11-12/images/stm32mp1" in the STM32CubeProgrammer GUI. The OS is ubuntu 18.04 in a VM on Windows 10. The board is powered on, and the USB is connected via USB OTG.

I have a question about the Starter Package.When I start STM32MP157x-EV1 (+en.FLASH-stm32mp1-openstlinux-5-4-dunfell-mp1-20-11-12), I get the following logroot@stm32mp1:~# dmesg | grep ether[   1.642061] stm32-dwmac 5800a000.ethernet: PTP uses main clock[   1.646451] stm32-dwmac 5800a000.ethernet: no reset control found[   1.652761] stm32-dwmac 5800a000.ethernet: No phy clock provided...[   1.659898] stm32-dwmac 5800a000.ethernet: User ID: 0x40, Synopsys ID: 0x42[   1.665789] stm32-dwmac 5800a000.ethernet:  DWMAC4/5[   1.670828] stm32-dwmac 5800a000.ethernet: DMA HW capability register suppord[   1.678090] stm32-dwmac 5800a000.ethernet: RX Checksum Offload Engine suppord[   1.685379] stm32-dwmac 5800a000.ethernet: TX Checksum insertion supported  [  &nb

We have an virtual uart FreeRTOS application running on CM4, it captures SPI data and sends to A7 through virtual uart. Sometimes, the FreeRTOS application freezed, A7 can not read the data through /dev/ttyRPMSG0 again, at the same thime, Linux 5.4.31 running on A7 corrupted. the following is the log of Linux kernel. [ 491.026690] rcu: INFO: rcu_preempt self-detected stall on CPU [ 491.026718] rcu: 0-....: (2099 ticks this GP) idle=592/1/0x40000004 softirq=15656/15656 fqs=1049 [ 491.026727] (t=2100 jiffies g=19741 q=7229) [ 491.026736] NMI backtrace for cpu 0 [ 491.026749] CPU: 0 PID: 155 Comm: kworker/0:4 Tainted: G E 5.4.31 #1 [ 491.026754] Hardware name: STM32 (Device Tree Support) [ 491.026779] Workqueue: mlahb:m4@10000000 stm32_rproc_mb_vq_work [ 491.026814] [<c01124dc>] (unwind_backtrace) from [<c010d784>] (show_stack+0x10/0x14) [ 491.026837] [<c010d784>] (show_stack) from [<c0beacf4>] (dump_stack+0xb0/0xc4) [ 491.026860] [<c0beacf4&g

I'm trying to build the large buffer exchange example but have been unsuccessful so far. I have the distribution installed and have no problem building the default package but when I try to build with the logic analyzer I get repo failures and compile failures. I have 5.4 dunfell distribution installed with dunfell logic analyzer app downloaded, on a machine with ubuntu 20.04. I followed all the steps in the PC Prereqs page to setup the different tools needed to download and compile the distribution. When I try to compile I always get the following error:NOTE: Executing Tasks WARNING: openocd-stm32mp-native-0.10.0-release.AUTOINC+b5d2b1224f-r0 do_fetch: Failed to fetch URL git://repo.or.cz/git2cl.git;;destsuffix=git/tools/git2cl;name=git2cl, attempting MIRRORS if available WARNING: openocd-stm32mp-native-0.10.0-release.AUTOINC+b5d2b1224f-r0 do_fetch: Failed to fetch URL git://repo.or.cz/jimtcl.git;destsuffix=git/jimtcl;name=jimtcl, a

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Hy, I'm following all the wiki on stm32MP1-DK2 , I wan't to install PPP on it but like other things (htop for example) seems to be not available, maybe a stupid question but an answer will be appreciated,this is the log:apt-get install pppreading package list ... donebuilding dependency tree...doneE: unable to locate package pppThanks, Antonio

the kernel log is : mdio_bus stmmac-0: MDIO device at address 7 is missing.phy chip is : ksz9031mpu is : stm32mp157cac3my dts config is : &ethernet0 { status = "okay"; pinctrl-0 = <&ethernet0_rgmii_pins_a>; pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>; pinctrl-names = "default", "sleep"; clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx", "ethstp", "eth-ck"; clocks = <&rcc ETHMAC>, <&rcc ETHTX>, <&rcc ETHRX>, <&rcc ETHSTP>, <&rcc ETHCK_K>; assigned-clocks = <&rcc ETHCK_K>; assigned-clock-parents = <&rcc PLL4_P>; assigned-clock-rates = <125000000>; phy-mode = "rgmii"; max-speed = <1000>; phy-handle = <&phy0>; st,eth_clk_sel; mdio0 { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>;phy0: ethernet-phy@7 { reg = <7>; /* * These skews assume the

Hi all,I'm currently trying to change the CPU frequency of my STM32MP157C-DK2. - Without success...Here is what I've done.Change 'stm32mp15xa.dtsi' for Kernel and TF-Adiff --git a/arch/arm/boot/dts/stm32mp15xa.dtsi b/arch/arm/boot/dts/stm32mp15xa.dtsi index 5ed7e594f..3389a6094 100644 --- a/arch/arm/boot/dts/stm32mp15xa.dtsi +++ b/arch/arm/boot/dts/stm32mp15xa.dtsi @@ -8,6 +8,11 @@ opp-650000000 { opp-hz = /bits/ 64 <650000000>; opp-microvolt = <1200000>; - opp-supported-hw = <0x1>; + opp-supported-hw = <0x2>; }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1200000>; + opp-supported-hw = <0x2>; + }2 };Then I deployed the *.dtb and the TF-A binary as described in

I have a question,I have no any USB-OTG interface can be used to help me burning and I can only use SD card to run my board. How can I make this SD-Card work only on linux command lines for example "dd" and so on. I have made tf-a uboot kernel(image) dtb and rootfs. I wish someone can help me ,thank you so much.

I’m having some trouble getting u-boot to boot from eMMC. I’ve evaluated my system using the DK2(using SDCARD) and i’m now porting to a custom board. The custom board contains a STM32MP157CAB and a eMCC connected at sdmmc2.My u-boot devicetree(stm32mp157c-cau-mx-u-boot.dtsi) contains the following:aliases { usb0 = &usbotg_hs; mmc0 = &sdmmc2; };The first problem is the eMMC flashlayout file created by the distribution package, it is configured to use MMC1 by default. Is there a way to edit something that the file is created with MCC0 as default?The second problem is with u-boot, it stills want to boot from MMC1:NOTICE: CPU: STM32MP157CAB Rev.B NOTICE: Model: <product name> INFO: Reset reason (0x15): INFO: Power-on Reset (rst_por) INFO: Using EMMC INFO: Instance 2 INFO: Boot used partition fsbl1 NOTICE: BL2: v2.2-r1.0(debug):v2.2-dirty NOTICE: BL2: Built : 13:36:23, Oct 22 2019 INFO: Using crypto lib

Hi:When I do not enable sdmmc1 in the device tree , a null pointer error will appear, as follows: Unable to handle kernel NULL pointer dereference at virtual address 00000020[  4.406546] pgd = b1eff48d[  4.409244] [00000020] *pgd=00000000[  4.412826] Internal error: Oops: 17 [#1] PREEMPT SMP ARM[  4.418223] Modules linked in:[  4.421278] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 5.4.31 #1[  4.426906] mmc0: new high speed SDIO card at address 0001[  4.427205] Hardware name: STM32 (Device Tree Support)[  4.437847] PC is at mp1_mgate_clk_disable_safe+0x38/0x8c[  4.443241] LR is at mp1_mgate_clk_disable_safe+0x10/0x8c[  4.448644] pc : [<c06304bc>]  lr : [<c0630494>]  psr: 60000093[  4.454918] sp : df083eb0 ip : 00000000 fp : 00000008[&n

Hi,for our testing i want to activate the fullspeed OTG on the Pins PA11,PA12. VBUS_OTG is not routet out the Chip on the DK2. Is it possbile to use the FS phy on PA11/PA12 on the DK2 board?Best regards,Niklas

I am using 2 passive tamper detection in my board that is routed to PC1 (TAMP_IN3) and PC13 (TAMP_IN1) and I want to handle both tamper pins events in linux userspace. I have achieved my goal by adding small code at plat_setup and disabling tamper in device tree. I also modified the init function in stm32_tamp so it won't reset my configuration. In addition, I also disable secure tamp to make sure that I can modify the register in linux userspace. Inside my small code, I reset the tamp configuration first (copy from stm32_tamp_reset_register) and enable TAMP_IN1 and TAMP_IN3 by setting bit 0 and bit 2 in TAMP_CR1 register. I also set bit 0 and bit 2 in TAMP_CR2 register as I don't want to erase backup memory after tamper event. This my code snippet/* Enable clock */ mmio_write_32(RCC_BASE | RCC_MP_APB5ENSETR, mmio_read_32(RCC_BASE | RCC_MP_APB5ENSETR) | RCC_MP_APB5ENSETR_RTCAPBEN);   /* unlock

Hello,I'm trying to connect some sensors to the I2C1 connectors of the STM32MP157A-DK1 and read datas from a linux application (Cortex A7). It doesn't works...But I successfully read data from the I2C5 connectors from the Cortex M4 processor.I used the following configuration from STM32CubeMX for I2C1: But when i run #i2cdetect -y 0 #i2cdetect -y 1 #i2cdetect -y 2I don't see any of my devices:&nbs

Good morning,I'm working on a C++ project to collect data from a peripheral sensor using the STM32MP157C-DK2.The estimated amount of data is at least 100 MB, so I have to use the DDR3 to store these data and then trasmit them over Ethernet using at the moment ONLY Cortex-A7 (no M4).The project is write in C++ language and NOT using CubeMX, so I'm asking how can I activate and use the DDR3.I've read some tutorials/documents from various sources:# https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html#documentation# https://wiki.st.com/stm32mpu/wiki/How_to_exchange_large_data_buffers_wi

In our early evaluation phase, the stm32mp157 chip is ideal for our requirements - with the ability to do hard real-time processing with the M4 core but still have a Linux framework to develop interfaces to upstream processing applications. We feel that the DK2 Discovery board can be deployed in developed systems AS-IS until 'hardened' systems are needed for future military, space, and biomedical customers. The instrument technology we are developing is now being considered for phase-2 evaluation and studies with several interested clients but we need to know if the board will be available for a few years. In future 'hardened' systems, we and others will make our own boards using the stm32mp157 chip and request guidance regarding the long-term support commitment for the chip.Scott Tilden, PhDU of Arizona