STM32 MCUs Embedded software

I have implemented a USB Audio 2.0 device that receives audio from the PC host (speaker endpoint) and loops it back (microphone endpoint). The PC correctly recognizes the device, and audio playback works, but I'm experiencing unexpected low-frequency noise.Specific symptom: When playing a pure 350Hz sine wave from the PC, the device receives not only the sine wave but also significant noise content from 0Hz to 350Hz. This noise is audible in the loopback audio sent back to the host.The audio data flows through a simple memory copy without any DSP processing:ux_utility_memory_copy(write_buffer, read_buffer, copy_len); ux_device_class_audio_write_frame_commit(g_mic_stream, copy_len);I also perform FFT analysis for visualization (TouchGFX), and the spectrum confirms the low-frequency noise is present in the received audio data itself, not introduced by my processing.I have tried to disable the microphone endpoint and keep just the speaker endpoint but the issue persists.Any guidance on di

what am i doing wrong?

Hello ST Community,I am facing this issue developing firmware on the NUCLEO-N657X0-Q (STM32N657).My architecture involves a standard FSBL that jumps to a main Application.Application:Interfacing with a Adafruit BNO085 IMU via UART (3 Mbps) using the CEVA SH2 driver, adapting the official CEVA SH2 example code of this repository to my Nucleo. The driver uses USART2 with GPDMA1 Channel 0* (Circular Buffer for RX).Setup Details:MCU: STM32N657X0Peripheral: USART2 (3 Mbps) + GPDMA1 Channel 0 (RX Circular Buffer).Timer: TIM2 (used for microsecond timestamping in the driver).Cache: Disabled (to rule out coherency issues).Symptoms:1. FSBL: If I initialize and run the sensor logic inside the FSBL, it works perfectly.2. Application: If I move the exact same logic to the Application (after the jump), the code hangs inside the driver's code.3. Breakpoint fixes the problem: In the Application, if I place a breakpoint at the beginning of the shtp_service() function (called period

Hi everyone,I’m reaching out because I’m having trouble setting up a USB HS CDC (Communication Device Class) using the internal PHY, without VBUS sensing.I use STM32H7S3I8T6.My program gets stuck in the following loop before timing out: /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; do { count++; if (count > HAL_USB_TIMEOUT) { return HAL_TIMEOUT; } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); return HAL_OK; }Despite searching through various forum topics, I can't seem to get it to work.Here is my STM32 configuration:Clock : USB Clock :  Power Regulator :USB HS Configuration :USB_DEVICE Configuration :Here is my configuration.I would be very grateful for any help you can provide.Thanks in advance,Paul

I have flash update operations working fine on an STM32U535 with 512kB flash, but am getting an error on a 256kB device.  Driving into the debugger, I find it coming out of the FLASH_WaitForLastOperation HAL routine, specifically after: reg_sr = IS_FLASH_SECURE_OPERATION() ? &(FLASH->SECSR) : &(FLASH_NS->NSSR) which returns 0b10001000, which winds up being the FLASH_NSSR_PROGERR, and FLASH_NSSR_PGSERR.  I am not sure why.   Code segment enclosed here: const uint32_t NVRAM = 0x0803E000; FLASH_EraseInitTypeDef EraseInitStruct = {0}; HAL_StatusTypeDef hfError; uint32_t PAGEError = 0; // To hold any page error code uint32_t pageNumber = (NVRAM - 0x08000000) / 0x2000; uint32_t progAddress = NVRAM; uint64_t *pSource = (uint64_t)&memory[0x1800]; // 1800 uint32_t quadWordCount = 0xFF / 16; if (HAL_FLASH_Unlock() != HAL_OK) { printf("Cannot erase FLASH memory.\n\r"); // Handle error, e.g., print error message return; } // Clear

hi, i trying DTLS on netXduomy goal is TLS and DLTS running independently (STM32H5 is server, PC is client) so i success mutual TLS(Ver 1.3) but failed DTLS runningi'm in situation that DTLS connection is completed at client but server is not answer about client hello(3 time ignored) i check variables and found handler pointer is null - active_dtls_session->nx_secure_dtls_tls_session.nx_secure_session_cipher_handler_server == nullso i guess DTLS initialization was not completed but i don't know what do i do i attach my code and variables please help me thank you DTLS_SESSION_CONFIG g_dtls_session_table[1]; #pragma data_alignment=8 NX_SECURE_DTLS_SERVER dtls_server; typedef struct { NX_SECURE_DTLS_SESSION sessions[1]; ULONG padding; UCHAR metadata[32*1024]; } DTLS_MEMORY_BLOCK; NX_SECURE_DTLS_SESSION *active_dtls_session = NULL; UCHAR dtls_reassembly_buffer[32*1024]; UCHAR dtls_client_cert_buffer[20*1024]; #pragma data_alignment=8 DTLS_MEMORY_B

Hello, I am using the HAL for multi-master SMBUS operations on an STM32H753. I ran into a scenario in which the event handler interrupt function (I2C4_EV_IRQHandler() in my case) was repeatedly firing such that there was no CPU available for other code to run. It seems that the logic within HAL_SMBUS_EV_IRQHandler(), which the above function calls, may not be correctly identifying the source of the interrupt, and not clearing it. This code: /* SMBUS in mode Transmitter ---------------------------------------------------*/ if ((SMBUS_CHECK_IT_SOURCE(tmpcr1value, (SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET) && ((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))) { calls SMBUS_CHECK_I

Hello. How to configure the FreeRTOS LwIP bundle correctly on the STM32F407VET6 and PHY Lan8720, I'm configuring it in the Cube IDE. There is a ping without FreeRTOS, but there is no ping with FreeRTOS. Thank you very much.

hi all! i'm handling Foc-pmsm project, i use communicate ETH with other board via ETH but it connect too slow and open lost connection, i don't what issue because this is the first time i handle with ETH. can you help me take a look and show my mistake

Background: I am using the STM32H747I-DISCO board and the BSP SDMMC example from the ST Repository as my starting point.  I can provide my code if necessary but wanted to keep post as short as possible.  I have looked at AN4838, AN4839 and AN5200 ST Micro Documents.  They are detailed but not getting me to my answer fast enough.   My Goal:I am trying to understand the detailed reason(s) why I need to enable the D-Cache when using FatFS calls with the SDMMC peripheral on the STM32H747I-DISCO board to avoid a timeout and also why I-Cache does not necessarily need to be enabled.     My Understanding to this point: The CLIFF NOTES of what I think I understand (between the ST documentation, AI hallucinations and true answers): Enabling the D-Cache reduces AXI bus contention since the IDMA in the SDMMC peripheral needs AXI bus to move data from the FIFO to SRAM on a very tight timeline, mandated by the SDMMC peripheral.  When you enable the D-Cach

Hi all,I'm struggling to get SPI working on my STM32U5G9J. I have an nordic master device outputting 6 bytes of data every 500 ms over SPI and plugged into the proper pins, double checked and confirmed on analyzer.stm32u5g9j_dk2.overlay/ { aliases { spi-slave = &spi1; }; }; &spi1 { status = "okay"; pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pb5 &spi1_nss_pb0>; pinctrl-names = "default"; /delete-property/ cs-gpios; fifo-enable; };main.c#include <zephyr/kernel.h> #include <zephyr/logging/log.h> #include <zephyr/drivers/spi.h> #include <zephyr/drivers/gpio.h> #include <zephyr/sys/util.h> LOG_MODULE_REGISTER(main); #define SPIOP (SPI_OP_MODE_SLAVE | SPI_WORD_SET(8) | SPI_LINES_SINGLE | SPI_TRANSFER_MSB) static const struct device *spi_in_dev = DEVICE_DT_GET(DT_ALIAS(spi_slave)); static const struct spi_config spi_in_cfg = { .frequency = MHZ(1), .operation = SPIOP, .slave = 0, }; int main(void) { if (!dev

Hello ST Community, I am working on STM32N6 with an IMX335 camera sensor, ThreadX + USBX, and trying to stream live camera video over USB Type-C (UVC) to an external screen / PC. Current status: - Camera + ISP + DCMIPP pipeline is working correctly - Live video is already displayed on the STM32N6 board screen - I want the same live video to be streamed via USB Video Camera / ISP configuration: - Sensor: IMX335 - Sensor output: RAW10 - ISP enabled and processing the RAW data - Frame size currently: 800 × 480 - Pixel size in memory: 2 bytes per pixel - DCMIPP is writing frames to memory using DMA My main confusion is: What is the exact output format from the ISP to memory?Is it RAW, RGB, or YUV (YUY2 / NV12), and how do we confirm this from the HAL / ISP configuration? USB UVC configuration I am using USBX Device Video (UVC) generated from CubeMX. CubeMX gives two main options for video streaming format: UNCOMPRESSED MJPEG UNCOMPRESSED: I understand this usually means YUY2 (YUV422) for U

I am using software Independent watchdog at STM32H735IGK and i want to freeze it when entering standby mode.I set option byte FW_IWDG_SDBY unchecked but unfortunately it is not working and my program keeps getting out from standby mode.My code:At init:MX_IWDG1_Init(); While the program is running:__HAL_IWDG_RELOAD_COUNTER(hiwdg); When entering standby: HAL_RTCEx_DeactivateWakeUpTimer(&hrtc); HAL_PWREx_ClearWakeupFlag (PWR_WAKEUP_FLAG_ALL); __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU); __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP1); // E1 __HAL_PWR_CLEAR_WAKEUPFLAG(PWR_FLAG_WKUP4); // INT //Configuring wakeup pins PWREx_WakeupPinTypeDef sWakeupPin1; sWakeupPin1.WakeUpPin = PWR_WAKEUP_PIN1; sWakeupPin1.PinPolarity = PWR_PIN_POLARITY_LOW; // Flanco de bajada sWakeupPin1.PinPull = PWR_PIN_PULL_UP; HAL_PWREx_EnableWakeUpPin(&sWakeupPin1); PWREx_WakeupPinTypeDef sWakeupPin4; sWakeupPin4.WakeUpPin = PWR_WAKEUP_PIN4; sWakeupPin4.PinPolarity = PWR_PIN_POLARITY_LOW; // Flanco de bajada

Hey there at @Pavel A. I've implemented USBCDC as a device In stand alone mode successfully I intend on implementing CDC host stand alone that is to say without X-thread RTOS.The generated files from cube MX don't have Read_run and Write_run functions for stand-alone when implementing the host side which makes me wonder if it is achievable you to have USBx as a host in stand alone.

Hi everyone,I am working on a custom board based on the STM32F429I MCU (RMII mode) and I am trying to integrate LwIP with a DP83848 PHY.At the moment, I am unable to get Ethernet working. The issue appears during PHY initialization — the code blocks while trying to communicate with the PHY over MDIO.Project ContextMCU: STM32F429IPHY: DP83848 (RMII mode)Middleware: LwIPDevelopment tool: STM32CubeIDE (project originally generated with CubeMX, but I cannot re-generate it now due to version mismatch)ETH driver: HALI have tried:Using the LwIP stack with the HAL ETH driverAttempting raw Ethernet (without LwIP)In both cases, the system gets stuck during PHY initialization.Observed BehaviorThe code freezes when accessing PHY registers (MDIO communication).When debugging, execution appears to stop when checking or configuring the ETH clock.The PHY does not respond to register reads.Suspected CauseI suspect either:The RMII clock (50 MHz reference clock) is not correctly generated or routed.The P

Hi All,   I have been using SPI1 over DMA2 on Zephyr RTOS recently to read my external flash. I had done similar thing on Bare metal / FreeRTOS based program. Both of them work fine. However, there is a problem in Zephyr based implementation of its driver compared with what i developed on Bare Metal. I configure the SPI1 to use its full possible clock 42MHz on both platforms. On my bare metal platform it runs at full 42Mbps but on Zephyr it starts giving read errors. However, if i reduce the clock to < 42MHz (to which zephyr driver forcelly rounds it down to 21MHz) it works fine.Here is my dts node of spi1 for my development board: &spi1 { pinctrl-0 = <&spi1_sck_pb3 &spi1_miso_pb4 &spi1_mosi_pb5>; pinctrl-names = "default"; clock-frequency = <42000000>; // 42MHz dmas = <&dma2 2 3 (STM32_DMA_PERIPH_TO_MEMORY | STM32_DMA_MEM_INC | STM32_DMA_PRIORITY_HIGH) STM32_DMA_FIFO_1_4>, <&dma2 3 3 (STM32_DMA_MEMORY_TO_PERIPH | STM32_DMA_M

I am using below component toolsMCU: STM32H750IBT6IDE: STM32CubeIDE Version: 1.20.0GUI: TouchGFX Version: 4.26.0SDRAM: IS42S32400J-6TLIFLASH: MT25QL512ABB8ESF-0SIT (QUADSPI) I have made my own external loader that proves works for the QUADSPI IC using this video: https://www.st.com/content/st_com/en/support/learning/stm32-education/stm32-moocs/external_QSPI_loader.html Thank you in advance!

Hi all,I am currently trying to merge the STM32N6 VENC_SDCARD Project with my Codebase that is based on the STM32 Modelzoo Object Detection (https://github.com/AlexGraefe/STM32N6CameraEvaluation). However, naively copy-pasting the code does not work. For most resolutions, the generated h264 streams are wrong and for the others, the code crashes at weird places e.g., when leaving a function. As the only difference between my code and the VENC_SDCARD example is the linker script, I was wondering if wrong memory allocations might be the reason for this. The heap in the object detection example is placed on AXISRAM1, which might too small. However, I am unable to place the heap onto other parts of the RAM (internal or external), without the program crashing directly upon startup.Copying the linker script provided by VENC_SDCARD also does not work as then, I run into compilation errors stating the code uses too much RAM (as buffers for images are placed in different regions).Moreover,

HiCan anyone please show me an example of a working USB CDC Host sending the SetControlLineState command? This hasn't been implemented in the STM32 HAL drivers/middleware but it should be a simple thing to add.SetControlLineState is used to signal the Host is ready to receive data from the CDC device. I tried adding and calling my own routine after the USB enumeration completes:USBH_StatusTypeDef USBH_CDC_SetControlLineState(USBH_HandleTypeDef *phost) {   phost->Control.setup.b.bmRequestType = USB_H2D | USB_REQ_TYPE_CLASS | USB_REQ_RECIPIENT_INTERFACE; phost->Control.setup.b.bRequest = CDC_SET_CONTROL_LINE_STATE; phost->Control.setup.b.wValue.w = 3U; phost->Control.setup.b.wIndex.w = 2; phost->Control.setup.b.wLength.w = 0;   return USBH_CtlReq(phost, 0, 0); }The transmitted data appears to be correctly formed but the phost->RequestState appears to get stuck on CMD_WAIT expecting a reply from the device which I understand is not part of the CDC proto

Hi,I am using Nucleo-L476RG. My I want to send data over SPI every 20000ms and during this 20000ms MCU will goes in sleep/standby mode. I want to keep track time of last 2 SPI data transmission.But the issue is HAL_GetTick() reset after waking up from standby mode. so not able to track the time between last two data transfer.

Hello      I'm working with the STM32N6570-DK board to capture images using the IMX335. I want to save 480x800 images from PIPE1 of DCMIPP to External RAM. I've tried searching for examples on the STMicroelectronics Github, but most examples save to AXISRAM. Does anyone have simple example code or steps for doing this? Do i need to config xSPI first? or do i need to put something into ".ld" file?

Is there a build tool to insert two .hex files into my final image?  I am retroactively updating an existing firmware by moving a bootloader I've created from an unused place in the updated image into its proper sector. But to do this, I need to insert the bootloader into the image I am updating with. (Update image contains existing code + boot image1 + boot image2) My main update image will be contained in sector 0 - 5. My first separately built bootloader.hex file must be squeezed into sector 6, and my second separately build bootloader2.hex must be squeezed into sector 7.  I have found it is possible to use the linker file to insert raw hexadecimal bytes, but this requires converting the .hex file to an ascii hex array, copying it over and then building. Is there a command line build tool alternative to do this cleanly?

Hello, i am trying to store adc calibration data in flash on my H7A3 project.Writing the data (64byte, flash addr 16byte aligned) is successful (at least i hope, since i get no errors), but when reading the same data back from flash via that same Bank2 memory address, i only read zeroes.I was trying to use a same approach like the example program.Can somebody review my code and point me in the right direction?#include "stm32h7xx_hal.h" #include "stm32h7xx_hal_flash.h" #include "string.h" #include <stdint.h> #include "settings.h" #define FLASH_USER_START_ADDR FLASH_BANK2_BASE /* Start @ of user Flash area in Bank2 */ #define FLASH_USER_END_ADDR (FLASH_BANK2_BASE + FLASH_BANK_SIZE - 1) /* End @ of user Flash area in Bank2 */ // get flash sector number from address uint32_t GetSector(uint32_t Address) { uint32_t sector = 0; if (Address < (FLASH_BANK2_BASE + FLASH_BANK_SIZE)) { sector = (Address - FLASH_BANK2_BASE) / FLASH_SECTOR_SIZE; } else { sector = (Address - (FLASH_

Hi everyone, I'm having trouble jumping to the app from the bootloader.The application is located here, writing doesn't give me errors. So I assume the problem is Jump.#define FLASH_USER_START_ADDR ADDR_FLASH_SECTOR_2_BANK1 Il main del bootloader è costituito cosìint main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_QUADSPI_Init(); MX_SPI4_Init(); MX_I2C1_Init(); MX_RTC_Init(); MX_FMC_Init(); MX_USART6_UART_Init(); /* USER CODE BEGIN 2 */ HAL_GPIO_WritePin(ENABLE_3v3_WIFIPRINTER_uC_GPIO_Port, ENABLE_3v3_WIFIPRINTER_uC_Pin, GPIO_PIN_SET); printf("\

Hi ST Support Team,I'm developing a simple FSBL application (LED control) on a NUCLEO-N657X0-Q board to understand the boot management flow with FSBL and application separation.What I've done:Successfully tested the application running directly from RAM via debuggerCompiled the FSBL for external XSPI flash (linker configured for execution from AXISRAM2 at 0x34180400)Signed the binary using STM32_SigningTool_CLI with header v2.3, -nk flag (no keys), -of 0x00000000, and correct load address/entry pointProgrammed the signed binary to external flash at 0x70000000 using STM32CubeProgrammer with the appropriate external loaderConfigured BOOT0=LOW, BOOT1=LOW for boot from XSPI flashThe problem: The Boot ROM does not load the FSBL into RAM. When I read AXISRAM2 (0x34180000) after reset, it contains all zeros, indicating the Boot ROM is rejecting or not attempting to load the FSBL.What I discovered: In STM32CubeProgrammer → OTP MPU tab, I see:BSEC State: SecuredGlobal State: 0x00000001Additiona