STM32 MCUs Products

Hi,I am getting a warning "The core is locked up" and a few more (please refer to the attached image).I have also tried flashing with the hex file, but some flashing issue is observed.

Hello!I am interfacing an ADS131M02 ADC to the STM32C0116-DK board using SPI for a project I am developing on live streamings. I am able to read SPI Data using the HAL polling functions (HAL_SPI_TransmitReceive), however that created unwanted delay between bytes and I tried swithing to DMA to improve performance. Configuration:All clock to max (48MHz)SPI: Full-Duplex Master, 8bits, Mode 01, DMA Tx + DMA RxPrescaler 2: BaudRate 24 MBits/s -> FAILPrescaler 4-Max: SUCCESSThis is the result with prescaler set to 4 (12 Mbits/s). (Pink: MISO, Blue: SCK), the data is correct.With the Prescaler set to 2 (24MBits/s) (Pink: MISO, Blue: SCK). The clock does not even try (the pulse is 3us)The Pseudocode I am using:/** Simplified code **/ uint8_t newData = 0; // This is never called if the SPI prescaler is set to:SPI_BAUDRATEPRESCALER_2 // With SPI_BAUDRATEPRESCALER_4 works. void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef* hspi) { newData = 1; } void main(void) { // All CubeMX ini

I am working on the NUCLEO-H755ZI-Q, which contains a dual-core STM32H755 (Cortex-M7 + Cortex-M4). I configure the system clocks in CubeMX as follows: SPI1/2/3 Clock MUX: 400 MHz System Clock: Configured for high-speed operation CM7 core frequency: Correctly matches the configured value (e.g., 200 MHz / 400 MHz depending on settings) However, when I debug or read the CM4 core clock, I always see: CM4 clock = 64 MHz It does NOT increase even when I configure higher values in CubeMX.  Regards, Prathiksha

Hy,we are about to create a Proof-of-concept system for a camera application. We want to use STM32N6 Nucleo-144 board (MB1940) Board and add a extension board to CN2, CN3, CN15 and CN16. The project needs Ethernet (which we want to use from Nucleo Board) and PSSI16 Bit (which we want to realize on the extension board).I create a CubeMX project from scratch and select Nucleo Board as starting point.I am not able to configure both, Ethernet and 16 bit PSSI. When I start from the controller itself (no Nucleo) it seems to workWhat do I miss?Best regardsHarald 

Sequent Microsystems designs and sells Automation Systems using Raspberry Pi. All our products use STM processors. We use about 10,000 processors per year in different configurations. Generally we do not have any quality problems, but occasionally we run into a defective lot. On a recent run of 30 prototypes using STM32G431CBT6, 50% were defective. We replaced the processors and all boards worked as expected. We buy all out processors from a Chinese distributor.We saved the defective processors and I would like to know if you would have any interest in inspecting them to find out why they entered the distribution chain, and to advise us how to avoid this problem in the future. Mihai BeffaCEOSequent Microsystems

Bit-banding Alternatives for Modern ARM Cores Background Information: The bit-banding feature available in ARM Cortex-M cores (ARMv7-M architecture including Cortex-M3 and Cortex-M4) provides hardware-level mapping of individual bits within a 1 MB memory region to words in a 32 MB alias region. This mechanism enables atomic bit manipulation without requiring read-modify-write operations.   Specific Query: For ARM Cortex cores beyond M7 architecture that do not support the bit-banding feature, could you please provide detailed information regarding:   Available alternative methods for atomic bit manipulation Performance implications of these alternatives Recommended implementation strategies for maintaining atomic operations Code examples demonstrating these alternative approaches Request for Documentation

I am using a Nucleo-N657X0-Q board to prototype a data collection system that collects samples from an ADC connected to the SAI peripheral and places the results in RAM. If I use CPU AXI RAM0 as the destination this works correctly, but if I change the destination to DTCM all I get is a buffer full of zeroes.According to chapter-17 of the ref manual, HPDMA1 AXI port has access to the DTCM and I am setting the DAP field of HPDMA-CH0 TR1 register to Port-0 as required (setting it wrong results in a DTEF interrupt).I have RISAF 1 and RISAF 2 set as follows: RISAF1->REG[0].CFGR = 0x00000000; RISAF1->REG[0].CIDCFGR = 0x00FF00FF; /* RW for everyone */ RISAF1->REG[0].STARTR = 0; RISAF1->REG[0].ENDR = 0xFFFFFFFF; /* all-encompassing */ RISAF1->REG[0].CFGR = 0x00000101; /* enabled, secure, unprivileged for everyone */ RISAF2->REG[0].CFGR = 0x00000000; RISAF2->REG[0].CIDCFGR = 0x00FF00FF; /* RW for everyone */ RISAF2->REG[0].STARTR = 0; RISAF2->REG[0].ENDR = 0

 I am working with an STM32F0 device and I want to implement a firmware update mechanism.My current plan is to split the internal flash into three regions:Bootloader: 0x08000000Application Slot 1 (App1): 0x08004000Application Slot 2 (App2): 0x08008000The bootloader always runs first.Only one application slot is active at a time.The update flow is planned as follows:If App1 is currently running and a new firmware update arrives, the new firmware is written to App2.If App2 is running, the new firmware is written to App1.After the update, the bootloader selects which slot to boot.My concern is about the linker script (.ld) configuration:When I build a new application firmware, I set the flash origin address in the linker script to:  FLASH (rx) : ORIGIN = 0x08004000This works correctly when the firmware is programmed into App1.However, if the same binary is written to App2 at address 0x08008000, the vector table, reset handler, and absolute addresses inside the firmware will

We’re using the STM32N6570-DK to test camera input, video encoding, and writing to an SD card.The VENC_SDCard_Appli example doesn’t work for us the SD card only contains zeros. However, VENC_SDCard_ThreadX works fine, producing video at 800x480 resolution. We’re looking for examples or guidance on encoding at 1080p. When we adjust the encoder parameters and level, we encounter memory allocation failures in EncAsicMemAlloc_V2. Thanks in advance for any advice!

I am working on an STM32N6 hardware design, and have reviewed both development kit reference designs (MB1939/MB1940). Both designs use the same power supply scheme, when using internal SMPS it has 2x 3V3 regulators and 3x 1V8 regulators.I am interested in combining several power supplies if possible, notably:1. Is it possible to tie all 3V3 together?While AN5967 suggests to apply VDD33USB in the last step of power sequencing, the VDD33USB supply is noted to be independent of the other supplies within the N6, just like the VDDIOx supplies. The reference designs have tied VDDIO4 to VDD at 3.3V, which makes me believe I could also combine VDD33USB and VDD.Aside from just VDD33USB and VDD, all the 3.3V peripherals on the dev kits come from the second 3V3 supply, can I tie all peripheral 3V3 to VDD33USB and VDD, so I have a single 3V3 rail on the PCB?If not what about the STM32N6 disallows this?2. Can I combine 1V8 for peripherals with VDD18AON?Is there anything against connecting

Experimenting with STM32F427 and STM32F446 I found out, that the RCC_CR.HSEBYP bit is *not* reset by Software reset. It is reset only by NRST and Power-On reset.While applications where this could lead to problems (i.e. where HSE clock source is changed on-the-fly and software after performing Software reset relies on reset state of this bit) are probably very rare, it may result in an "interesting" surprise if one stumbles upon it, and deserves to be documented.Can ST please confirm/explain and document?Thanks,JW

Hello sir/miss , According to the STM32H7 datasheet, the range of the HSE external crystal oscillator is 4M - 48MHz. However, when we used the STM32H7IIT6-EVAL evaluation board and replaced the original 25MHz surface mount passive crystal oscillator with a 48MHz passive crystal oscillator, we were unable to obtain the corresponding 48MHz frequency from the MCO-PA8 pin. Summary: All conventional passive crystals from 4M to 40MHz were tried and worked fine. However, for external passive crystals above 40MHz , just like 48MHz, the MCO output waveform frequency was 16MHz, which is 1/3 of the HSE frequency, and it was unable to output 48MHz. Please provide a solution or suggest areas where we can improve the test. Thank you very much!

Hello I would like to build a full bridge converter according to attached topology picture. The signals for controlling the switches should be like in the picture pwm_scheme. The frequency should be 500KHz. How to configure TIM1 or TIM8 on STM32H725ZGT6 to achieve this? To control the current i1 with lowering the duty cycle of the PWM which input is better to use: ETR or BKIN? Best regards Simon

Hello Community,We are currently evaluating the STM32H562IGT6 microcontroller for our development project. During our review of the device’s pinout, we observed that several GPIO pins are designated as FT (5‑V tolerant). We would like to request clarification regarding the electrical behavior and long‑term reliability of these pins when subjected to a continuous 5 V digital input.Specifically, we would like to understand whether applying a constant 5 V signal to the FT‑labeled pins may have any impact on product lifetime, derating considerations, or long‑term performance degradation.The following pins are of particular interest for this inquiry:PC0FT_aPC1FT_ahPA0FT_atPA6FT_ahPA7FT_ahPC4FT_aPC5FT_ahPB1FT_ahThank you.Regards,Rajesh Matere

According to the STM32 datasheet, the maximum clock frequency of TIM6 and TIM17 is shown as 64 MHz, while that of TIM1 to TIM8 is shown as 200 MHz. There is a conflict in the documentation, so please confirm which one is correct. (DS14258 Rev6,page 132)The datasheet indicates that the maximum supported clock frequency of SPI is 100 MHz, but no errors are displayed when configuring 200 MHz in CubeMX. Please confirm the actual maximum clock frequency of SPI.

So on the page https://www.st.com/content/st_com/en/stm32-mcu-product-selector.html i cannoy filter out STM32 products which have higher resolution ADC converters built in, i need high resolution input (>16bits or eq SD) and there is no way to select for that.I had more luck on Digikey parametric selector which is odd (and not as good as manufacturer parametric filter/selector)...Also for web designers, some grayscale shading change between sections, rows, columns would be helpful, dark mode (even Digikey and Wikipedia has that option now)!Any advice in case I'm missing something.

  We are working on a bare-metal application using USBX on an STM32N657X0H3Q device.In CubeMX, we configured USB1_OTG_HS under Connectivity and enabled USBX in Middleware. However, when we execute the following function: static void MX_USB1_OTG_HS_PCD_Init(void) { /* USER CODE BEGIN USB1_OTG_HS_Init 0 */ /* USER CODE END USB1_OTG_HS_Init 0 */ /* USER CODE BEGIN USB1_OTG_HS_Init 1 */ /* USER CODE END USB1_OTG_HS_Init 1 */ hpcd_USB_OTG_HS1.Instance = USB1_OTG_HS; hpcd_USB_OTG_HS1.Init.dev_endpoints = 9; hpcd_USB_OTG_HS1.Init.speed = PCD_SPEED_HIGH; hpcd_USB_OTG_HS1.Init.phy_itface = USB_OTG_HS_EMBEDDED_PHY; hpcd_USB_OTG_HS1.Init.Sof_enable = DISABLE; hpcd_USB_OTG_HS1.Init.low_power_enable = DISABLE; hpcd_USB_OTG_HS1.Init.lpm_enable = DISABLE; hpcd_USB_OTG_HS1.Init.use_dedicated_ep1 = DISABLE; hpcd_USB_OTG_HS1.Init.vbus_sensing_enable = DISABLE; hpcd_USB_OTG_HS1.Init.dma_enable = DISABLE; if (HAL_PCD_Init(&hpcd_USB_OTG_HS1) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN

New question = New thread. Split from this post. Hi mƎALLEm, Thanks for the support, I was able to successfully perform UART-based flashing. For the actual use case, I need to flash the STM32F767ZI Nucleo using the CAN interface. I have a PEAK USB-to-CAN converter and an external CAN transceiver and ST-Link V2. According to AN2606 (Table 94), the STM32F767 series supports booting via the CAN2 interface when the appropriate boot pins are configured. The STM32CubeProgrammer User Manual also mentions CAN as a supported bootloader interface. However, in STM32CubeProgrammer, there is no option to select a CAN interface. Does the STM32F767ZI Nucleo actually include a CAN bootloader? Can a PEAK USB-to-CAN adapter be used for CAN flashing, or is an ST-Link V3 required since it provides a CAN bridge? Could you please suggest the correct method or recommended setup for implementing CAN-based flashing on the STM32F767ZI Nucleo? Thank you, Arun_Badiger.  

hii am using stm32u585 controller for my project . here i enabled the internal tamper detection using the below code  /* USER CODE BEGIN TAMP_Init 2 */ sAllTamper_inter.IntTamper = RTC_INT_TAMPER_1|RTC_INT_TAMPER_2|RTC_INT_TAMPER_3|RTC_INT_TAMPER_9; sAllTamper_inter.NoErase = RTC_TAMPER_ERASE_BACKUP_ENABLE; sAllTamper_inter.TimeStampOnTamperDetection = RTC_TIMESTAMPONTAMPERDETECTION_ENABLE; if (HAL_RTCEx_SetInternalTamper_IT(&hrtc, &sAllTamper_inter) != HAL_OK) { Error_Handler(); }from the reference manual its mentioned that internal temperature tamper can detect when the temperature range is out of operational temperature and there is no specific data about the tamper triggering temperature range.based on the operation condition as mentioned in the datasheet i varied the ambient temperature  but in both below and above functional range also i cant able to detect the tamper in my device .expecting a answer ASAP since i need to release the product for testing

Hi all,I'm currently designing a board that requires using an stm32h723 with USB HS (I need more bandwidth than FS allows). The stm32h723 I'm using doesn't expose pc2 or pc3, which are needed for ULPI DIR and NXT respectively. Instead, pc2_c and pc3_c are exposed as pins on the chip. These are internally connected to pc2/pc3 internally with an analog switch, but is this really sufficient for ULPI? The datasheet doesn't seem to be clear.The stm32h747 datasheet does specify using ULPI over pc2_c/pc3_c, which makes me think it's at least been considered. I'm curious why it doesn't seem to be specified in the stm32h723 datasheet (either specifying whether it will or won't work)I did find a few forum posts of people using pc2_c/pc3_c with USB, although it seemed like this had issues (including hardware damage, possibly of the analog switch itself).Thanks!

Hello,   I am very heravily struggling setting up my ADC in continmous conversion mode with HPDMA with multipkle channels.   The DMA seems to stay idle, while the SFRs are saying the ADC is running.   Is there a issue in the config of the ADCs?   /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file adc.c * @brief This file provides code for the configuration * of the ADC instances. ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------

I am designing a compact, low power device using the STM32L433.The device is powered by a 1S battery and I use a buck-boost converter (TPS63070) to generate the 3.3V supply.However, at the moment the buck-boost converter is permantely powered (enable pin permentatly pulled high).I use both shutdown and standby power modes, which use WKUP2 (pin PC13) and RTC to wake the STM32.  But I have just noticed the VBAT pin which could potentially reduce power consumption drastically.  In both shutdown and standby power modes, I use RTC and LSE.However, there are two issues I am not sure how to resolve.1. The WKUP2 pin currently uses the 3.3V from the buck-boost converter (I copied the same circuit used on the Nucleo develpment board).  But if I disable the buck-boost converter then there will be no 3.3V supply to the switch for the WKUP pin, so the STM32 would never wake.  The circuit is shown below.. 2. The battery is 1S so could be up to 4.2V, but t

I have a project in which I try to sync my assembly code on a signal on a GPIO, using WFE for minimum latency and jitter.I use a Rust HAL ony for initialisation of the clock and to put some GPIOs into input mode, and one in output mode that I use to check the timings of my assembly code with an oscilloscope.The synchronization works (PA15 in input mode, using EXTI line 15 to send the wake-up event), but the WFE also wakes up at regular interval. Apparently every second when no debuger is connected, and maybe a bit slower when openocd / gdb is connected.I try to understand why it does wake-up, but really can't find anything. Here are the sources of wake-up I checked:- Interruptions:SEVONPEND is zero (gdb) x/t 0xE000ED10 0xe000ed10: 00000000000000000000000000000000 and if I replace the stack with $AAAAAAAAs, I see no trace of an interruption being called when the core wakes up.- Event on EXTI lines:EXTI_EMR1 and EXTI_EMR2 only activate Px15 (gdb) x/t 0x40010404 0x40010404: 00000000000000

 Hi, The STM32G474CEU6 LQFPN48 was previously used in our projects with a 3.3 V supply, where we successfully operated a 25 MHz FL2500326 crystal using 6.8 pF load capacitors, and the crystal oscillation was stable.In the current design, the same controller is powered at 1.8 V for all VDD, VDDA, and VREF+ pins, while using the same crystal and the same load capacitors. However, under this configuration, the crystal oscillator does not start, and no crystal output is observed.As an alternative, we are currently using HSI clock (16 MHz) as system clock in our application. It is observed in other posts that HSI cannot be used for high speed peripherals like USB and Ethernet due to it's low accuracy, and also it varies with temperature. In our application, we are using 2 - UARTs, 2 - I2Cs and one SPI along with few GPIOs. Is it recommendable to run the STM32g474 with 1.8V VDD? Also can someone give advice on the HSI system clock mode?  Please let us know how to sol

I created a 10Hz sine function with phase of pi/4, amplitude of 1000, bias of 2000, a sampling rate of 1kHz, and 2048 samples (20 periods in total) and saved it into q15_t input[2048].I created a fft stract by arm_rfft_init_q15(&S, 2048, 0, 0)I entered the input into arm_rfft_q15: arm_rfft_q15(&S, input, output), while output define as q15_t output[4096]I took the input and output and copied them to Python.I used fft in Python on the input data.In addition, I arranged in Python the output of arm_rfft_q15 by calculating the magnitude of the numbers (where each pair of consecutive indexes represents the real and imaginary parts of a number) and then I applied fftshift on the data.The input, and the fft from python and arm_fft_q15 are attached.I don't understand why I do not get the same result from python and from arm_fft. Python's result seems logical (one peak at the oscillation frequency) and arm_fft's result are not make sense. Why do I get a lot of peaks and how do I convert