STM32 MPUs

I am using the STM32MP131 in a baremetal environment. Since there is no internal flash, I am planning to use external flash and DDR.I have confirmed that writing to and reading from the flash works, but I don't know how to start from FLASH instead of SYSRAM when powering on.I saved the FW's bin data at address 0 of the Flash and tried changing the boot mode to QUADSPI Flash, but it did not work.I think QUADSPI needs to be activated before reading and executing from Flash. Where should I activate this?Do I also need to modify the linker script for the firmware that runs from Flash? Please let me know if you have any solutions to this problemThank you very much in advance.

Dear all, I was trying to setup the NVIC for EXTI for certain pins on STM32MP257F over CubeMX. However the nomenclature in CubeMX confuses me a lot. As I know there are two EXTIs: EXTI1 and EXTI2 which completely changes when we look into NVIC there it shows EXTI and EXTI1. Now the confusion is if EXTI is EXTI1 or 2 and so on.Thanking you all.with regardsAmit  

Hi,I’m working with a MYIR MYD-YA157C (STM32MP157AAC) board and I’m trying to restore a board using STM32CubeProgrammer (USB / DFU mode) with a FlashLayout TSV.The board is custom made , but the HW should not be a problemBut i am running into erorr: 16:47:55 : Download in Progress:16:47:56 : Error: failed to download Sector[0]16:47:56 : Error: failed to download the File16:47:56 : Error: Download partition 0x21 failed16:47:56 : Error: TSV flashing service failed16:47:56 : Disconnected from device. Little bit of a backgroundThe chip comes with preloaded yocto , and after trying to flash our distro we get this erorr  I tried the following thingsRemove everything from the EMMC - Nothing helpsChaning offsets - Did not helpUse UDF tool - Did not helpTried on different computer - Did not helpTried different cable  - Did not help It is very strange I attached logs from Cube programmer @Aimen1  Could somebody help us with some suggestions

I am working with the STM32MP257F-DK using the official Starter Package. Suddenly, the board entered a state where several power rails are disabled. The ST-LINK LED (LD5) is blinking red slowly, and there is no HDMI output (0V on the rail) I have SSH access via USB OTG (usb0), but the system is in a "degraded" state.The ST-LINK is not recognized by the PC.HDMI monitor detects no signal. Diagnostic Data (Output of grep "" /sys/class/regulator/*/state): I have attached a screenshot, but here are the critical regulators currently in disabled state:regulator.11 (vdd3v3_usb) -> disabledregulator.12 (v5v_hdmi) -> disabledregulator.3 (vddio3) & regulator.4 (vddio4) -> disabledregulator.7 (vddcore) -> disabled (Surprisingly, since the CPU is running).Attempts to fix: Tried to enable them via sysfs: echo enabled > /sys/class/regulator/regulator.12/state -> Result: Permission denied.Tried to force it via I2C: i2cset -f -y 0 0x33 0x93 0x01 -> Result: Write

经我这三两天的多次调试，我终于找到了问题所在先说segger rtt viewer的工作方式首先，我将segger rtt的源码编译烧录到stm32mp257d_m33那里去。这时m33核的暂存会持有一个_segger_rtt结构体。然后我将这个结构体地址提供给segger rtt viewer，这时就会成功建立起通讯现在我通过segger rtt viewer向stm32mp257d_m33发送数据，这时jlink这个硬件工具就会通过swd直接操作暂存将数据写入到_segger_rtt结构体的下行缓冲区，按理会同时更新_segger_rtt结构体下行缓冲区的写位置WrOff而我在stm32mp257d_m33的用户代码逻辑是，将从swd收到的数据即刻原封不动的发还回去下面是我实际使用segger rtt viewer时的输入输出窗口的内容00> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=0< 55600> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=0< 5645600> WrOff=557, RdOff=557, HasData=000> WrOff=557, RdOff=557, HasData=0< 546546500> WrOff=557, RdOff=5

gpioinfo outputgpiochip9 - 10 lines:line 0: "PZ0" inputline 1: "PZ1" inputline 2: "PZ2" inputline 3: "PZ3" inputgpiomon output# gpiomon --num-events 1 --edges falling PZ0^C# gpiomon --num-events 1 --edges falling PZ1^C# gpiomon --num-events 1 --edges falling PZ2^C# gpiomon --num-events 1 --edges falling PZ3gpiomon: unable to request lines on chip /dev/gpiochip9: No such device or addresswhy is there a problem with PZ3 pin specifically? noone is using itshould i add something in dts?

For the STM32MP135 series, specifically the STPMIC1A I'm using, can VDD_CORE and VDD_CPU share the same power rail (buck1)?

My device is quite power-sensitive. If I use a single DDR3L module with an STM32MP157 or 135, can I eliminate the need for a VTT power supply?

Dear ST Community,I am currently working on a custom hardware design based on the STM32MP157CAC3 MPU, which includes LPDDR3 memory (Micron MT52L256M32D1PF) and multiple high-speed interfaces.As part of my signal integrity and high-speed design validation process, I need simulation models to conduct accurate analysis.I want to request the following:IBIS models for STM32MP157CAC3, specifically covering:1. DDR interface (LPDDR2/LPDDR3 controller)2. SDMMC interface3. Any other relevant high-speed I/Os(MIPI, LTDC, DCMI, SDMMC)S-parameter models (if available) for:1. High-speed I/O buffers2. DDR interface pins or PHYAny additional resources that may support SI/PI analysis, such as:1. IBIS-AMI models (if available)2. Reference simulation setups3. Application notes related to DDR signal integrityProject details:Custom PCB (not a direct copy of STM32MP1 DK2)LPDDR3 operating btw 300 - 800 MHzGoal: Pre-layout and post-layout SI validation (HyperLynx/ADSI understand that some of these models may r

Hello! I'm attempting to build a custom bootloader for the STM32MP133C, heavily reliant upon the STM32MP13XX hal layer and then provided cmsis_core and cmsis_device_mp13 packages/pieces. I'm attempting this on IAR (company decision) which has added some wrinkles to this. I load the main application to the NAND flash using a custom flashloader, and then run the Bootloader code from sysram. Can't do both at the same time because IAR's flash loader uses the sysram.The bootloader initializes the necessary items- the HAL, system clock, DDR, UART, Flash, Ethernet, etc. I have it blink an LED 5 times for fun, and then load the .bin file from flash into a specific offset in the DDR, where I'm hoping to run from. I then set a function pointer to the starting location of the main app, and run that function pointer. It looks pretty simple/straightforward, as shown below:  GetApplicationDetails(flash); //loads from flash to DDR. void (*p_AppEntryPoint)(void);//boot the full OSp

I'm in a bit of a pickle. I got a MIPI DSI screen with 1200x1920 resolution. It turns out for SMT32MP25x max vertical supported resolution is 1536. But datasheet says this.  Some over-target non-guaranteed use cases are possible, but with specific constraints:• Drive simultaneously three panels, using the three interfaces (parallel, LVDS, DSI), witha same content.• Drive simultaneously two parallel LVDS panels, using each one link, with a reducedresolution and a same content.• Drive a 4 k panel via the DSI, with a limited features and performances: one layer,no resize, no rotation, 30 fps, and non-standardized blanking sizes. How do i specify those params in dts or/and linux panel driver? I tried setting 30Hz on panel, but that did not help - linux drm fails with "vblank wait timed out"This fails - 1200x1920@30Hz.clock = 80288,.hdisplay = 1200,.hsync_start = 1200 + 32,.hsync_end = 1200 + 32 + 14,.htotal = 1200 + 32 + 14 + 26,.vdisplay = 1920,.vsync_start = 1920

Product:MCU/SoC: STM32MP2Description:In our ST Linux environment, the hantro-vpu driver registers:/dev/video5 -> VDEC (H.264/VP8 Decoder)/dev/video6 -> VENC (H.264/VP8 Encoder) We want to implement direct V4L2 API usage for H.264/VP8 encoding and decoding, without using GStreamer.Specific Questions: Are there official minimal examples or demos using pure V4L2 API for H.264 / VP8 encoding/decoding?DMA Usage: Is it possible to use DMA for input/output buffers in V4L2 mem2mem mode on STM32MP2 Hantro VPU? If yes, what is the recommended configuration and constraints? 

Is it okay to use the following connection for eMMC memory on the STM32MP157AAB3?Also, is it possible to set the eMMC memory to boot mode with this connection?PB14:SDMMC2_D0PB15:SDMMC2_D1PB3:SDMMC2_D2PB4:SDMMC2_D3PB8:SDMMC2_D4PB9:SDMMC2_D5PC6:SDMMC2_D6PC7:SDMMC2_D7PC1:SDMMC2_CKPG6:SDMMC2_CMD

Hello,I would like to ask about the current status of Bare-Metal support for the Cortex-A35 core on the STM32MP2x platform (STM32MP257F-DK).While searching the ST Community, I came across the following discussion related to this topic:https://community.st.com/t5/stm32-mpus-embedded-software-and/stm32mp257f-dk-bare-metal/td-p/787100Since that discussion is now more than one year old, I wanted to check whether there have been any updates regarding Bare-Metal development support on the STM32MP2 platform.When creating a project in STM32CubeIDE for the STM32MP257F-DK, I could not find an option to create a Bare-Metal project targeting the Cortex-A35 core.Could you please clarify the following:Is there now an official Bare-Metal project template for Cortex-A35 in STM32CubeIDE?Are there any application notes, examples, or documentation demonstrating how to run Cortex-A35 without Linux?Is there any roadmap update regarding official Bare-Metal support for STM32MP2x?Our use case requires:Fast bo

In the RM0506 rev. 1 file in chapter 14 (DDRPHYC), the DDR3L pins don't match the reference schematic in the examples-of-ddr-memory-routing-on-stm32mpus.zip file.In the STM32MP21XXAN_DDR3L-[No Variations]-A01_Schematic.PDF project, the DDR_A8-DDR_A31 pins have different functions.Which version is correct?RM0506STM32MP21XXAN_DDR3L-[No Variations]-A01_Schematic.PDF

Hi all,I'm trying to get a USB Gadget device working in Linux on the STM32MP257F-DK board to expose a Mass Storage device to another system. I'm trying to use CN15 for this function but I can't get the bound gadget to show up on the other side of the USB connection.I'm using a fork of github.com/STMicroelectronics/linux?branch=v6.6-stm32mp where I've modified the usb3dr node of the dk.dts file with the following things:1. 836 &usb3dr { 837 status = "okay"; 838 839 dwc3: usb@48300000 { 840 phys = <&usb2_phy2>, <&combophy PHY_TYPE_USB3>; 841 phy-names = "usb2-phy", "usb3-phy"; 842 usb-role-switch; 843 dr_mode = "peripheral"; 844 port { 845 dwc3_ep: endpoint { 846 remote-endpoint = <&typec_ep>; 847 }; 848 }; 849 }; 850 };2. 840 - phys = <&usb2_phy2>, <&combophy PHY_TYPE_USB3>; 841 - phy-names = "usb2-phy", "usb3-phy"; 842 840 usb-role-switch; 843 - dr_mode = "peripheral"; 841 + role-switch-default-mod

Hi, I'm using a STM32MPU157C with linux 6.6, uboot, OP-TEE 4.0 and TF-A 2.10 and I have a Device Tree (for linux and uboot) which declares the USB OTG node as following : &usbotg_hs { compatible = "st,stm32mp15-fsotg", "snps,dwc2"; pinctrl-names = "default"; dr_mode = "host"; pinctrl-0 = <&usbotg_hs_pins &usbotg_fs_dp_dm_pins>; vbus-supply = <&vbus_sw>; /delete-property/ wakeup-source; }; usbotg_hs_pins: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ }; }; usbotg_fs_dp_dm_pins: usbotg-fs-dp-dm-0 { pins { pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */ <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */ }; };I explicitly use it in FS as a Host and remove the wakeup-source declared by the stm32mpu151.dtsi.My problem is that I can see that when entering in suspend, there is a difference of ~4-5mW in power consumption depending on if the USB node is enabled or not in the device t

Hi,Greeting!I am working on the STM32MP135F-DK board and trying to interface a 4x5 matrix keypad using GPIOs.I configured the keypad as follows:Columns (C1–C5):C1 → PE1 (Pin 37)C2 → PF11 (Pin 35)C3 → PF9 (Pin 33)C4 → PD13 (Pin 31)C5 → PE6 (Pin 29)Rows (R1–R4):R1 → PA0 (Pin 40)R2 → PA5 (Pin 38)R3 → PA7 (Pin 36)R4 → PE5 (Pin 32)After modifying the device tree and flashing the updated .dtb, I observe the following issues:The display becomes glitchy.The boot logo appears corrupted.The system becomes unresponsive after boot.Recovery is only possible after reflashing the starter package using STM32CubeProgrammer.From my analysis:Manual GPIO control seems to work correctly.The matrix_keypad driver is loaded not properly.matrix_keypad 20480 0 matrix_keymap 12288 1 matrix_keypadI suspect this might be related to incorrect GPIO or pinmux configuration, possibly causing a conflict with other peripherals (e.g., display).Could you please help identify:The root cause of this issue?Whether these GPIO

I entered the lengths of the DDR traces from the ST official evaluation board into Excel, and the maximum length deviation is 3 mm. Is the trace routing on the evaluation board reasonable, and can I reuse it directly on my own board?   

It's telling me (for example) there's a "Path Entry Problem":Invalid project path: Include path not found (C:\Users\xxx\Documents\xxx\USB_CDC\USB_Device\Target).The Tool Settings / MCU GCC Compiler / Include paths contains"${workspace_loc:/${ProjName}/Application/USB_Device/Target}"and in my project there is a folder Application/USB_Device/Target, it links to a folder C:\Users\xxx\Documents\xxx\USB_CDC\STM32CubeIDE\Application\USB_Device\TargetHow can I figure out where this warning is coming from?(notice - the project builds just fine, it's just a warning, but company policy is to build without warnings)

I am running into issues building for the eMMC storage target for the `stm32mp25-disco` MACHINE type.I thought that adding "emmc" to `BOOTDEVICE_LABELS` should be enough to trigger building emmc flashlayout files. Is that not the case? I haven't found clear documentation on the subject.I tried making modifications to both `local.conf` and the machine conf directly. I was able to confirm the change takes affect with `bitbake -e`. Each time I build an image it only builds the flashlayout files for `sdcard`. What am I missing?mkdir yocto cd yocto repo init -u https://github.com/STMicroelectronics/oe-manifest -b refs/tags/openstlinux-6.6-yocto-scarthgap-mpu-v25.08.27 repo sync DISTRO=openstlinux-weston MACHINE=stm32mp25-disco source layers/meta-st/scripts/envsetup.sh printf "%s\n" 'BOOTDEVICE_LABELS = "emmc"' >>conf/local.conf bitbake core-image-minimal ls -l tmp-glibc/deploy/images/stm32mp25-disco/flashlayout_core-image-minimal/optee/ FlashLayout_sdcard_stm32mp257f-dk-ca35tdcid-os

I am trying to run my QT app directly on HDMI without wayland but for some reason it doesnt work. I am using the EGLFS  root@stm32mp1:~# export QT_QPA_PLATFORM=eglfsroot@stm32mp1:~# export QT_QPA_EGLFS_ALWAYS_SET_MODE=1root@stm32mp1:~# export QT_QPA_EGLFS_INTEGRATION=eglfs_kmsroot@stm32mp1:~# export QT_QPA_EGLFS_KMS_DEVICE=/dev/dri/card1root@stm32mp1:~# ./appFridGui-sh: ./appFridGui: not foundroot@stm32mp1:~# appFridGuiDetected locale "C" with character encoding "ANSI_X3.4-1968", which is not UTF-8.Qt depends on a UTF-8 locale, and has switched to "C.UTF-8" instead.If this causes problems, reconfigure your locale. See the locale(1) manualfor more information.drmModeGetResources failed (Operation not supported)[ 406.915847] appFridGui[760]: memfd_create() called without MFD_EXEC or MFD_NOEXEC_SEAL setCannot create window: no screens availableAbortedPlease help.

I was excited to see the Rust support for the Developer Package (seen here and here)However, I am having some issues with the fact that the provided toolchain is version 1.75 rustc and cargo. Mostly the fact that this version cannot use dependencies which use Rust edition 2024.I know I can go through dependencies one by one and downgrade them to earlier versions until there are no edition 2024 dependencies, but this is pretty tedious and doesn't seem like a great solution in the long run.Is there any chance that the MP2 Dev Rust addon could be updated to a more recent version?Or if that isn't possible, is there any advice on other ways to update the provided toolchain or create a custom rust toolchain using the mp2 dev tools?Thanks!

Several links on page about CRA are broken:https://wiki.st.com/stm32mcu/wiki/Security:Q%26A_for_CRA   https://wiki.st.com/stm32mcu/wiki/Security:Deep_dive_on_CRAFor this item, and in addition to solutions explained in (e), ST proposes several solutions of Secure storage.     

Hi,We use the USB OTG controller in host mode with its internal FS PHY.Our DT node is the following:&i2c4 { ... pmic: stpmic@33 { compatible = "st,stpmic1"; ... regulators { compatible = "st,stpmic1-regulators"; ... pwr_sw2-supply = <&vin>; ... vbus_sw: pwr_sw2 { regulator-name = "vbus_sw"; regulator-active-discharge = <1>; }; }; };};&usbotg_hs { compatible = "st,stm32mp15-fsotg", "snps,dwc2"; pinctrl-names = "default"; pinctrl-0 = <&usbotg_hs_pins &usbotg_fs_dp_dm_pins>; dr_mode = "host"; vbus-supply = <&vbus_sw>;};&pinctrl { usbotg_hs_pins: usbotg-hs-0 { pins { pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */ }; }; usbotg_fs_dp_dm_pins: usbotg-fs-dp-dm-0 { pins { pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */ <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */ }; };};This configuration was perfecly working with ST linux v5.10-stm32mp-r2.1.We bumped ST linux to v6.6-stm32mp-r1 and issues appeared with