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March 25, 2026
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DDR VTT Power Supply Issues

  • March 25, 2026
  • 1 reply
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My device is quite power-sensitive. If I use a single DDR3L module with an STM32MP157 or 135, can I eliminate the need for a VTT power supply?

Best answer by ZAKARIA_C1

Hello @LH1,

Based on ST's AN5692, yes you can eliminate the VTT power supply when using a single DDR3/3L module with the STM32MP13x (and similarly with STM32MP157) by adopting the cost-optimized point-to-point topology.

How It Works

In a standard DDR3L design, VTT is required to terminate the address/command (A/C) bus and reduce signal reflections. However, in a point-to-point topology with a single DRAM, the transmission line stubs are eliminated, making on-board termination unnecessary. Instead, the reflections are controlled via 33 Ω series resistors on every A/C signal, which act as source termination.

Key Design Rules to Follow

  • A/C bus — point-to-point connection, no on-board termination, 33 Ω series resistors on each signal (can be removed if the DDR is placed very close to the SoC)

  • CLK_N / CLK_P — terminated differentially with a single 100 Ω resistor (no VTT needed here either)

  • Data bus (DQ, DQM, DQS) — standard point-to-point, no termination required

Power Sensitivity Benefit

Eliminating VTT is a significant win for power-sensitive designs, since VTT typically mirrors half the VDDQ voltage and can draw tens to hundreds of mA dynamically during bus activity. Removing it reduces both BOM cost and standby/active power consumption.

Important Caveats

  • This topology is only valid for a single DDR module as soon as you add a second chip (x32 or dual-rank), you reintroduce stubs and will likely need termination again

  • Placement still matters: keep the DDR3L as physically close as possible to the STM32MP1x to minimize trace lengths and benefit from removing the 33 Ω resistors entirely

  • Always validate signal integrity with your specific PCB stackup, especially if traces exceed a few centimeters

For more details on DDR topology and cost-optimized designs, please refer to AN5692 available on www.st.com.

Best Regards,
Zakaria

1 reply

ZAKARIA_C1Best answer
Technical Moderator
March 25, 2026

Hello @LH1,

Based on ST's AN5692, yes you can eliminate the VTT power supply when using a single DDR3/3L module with the STM32MP13x (and similarly with STM32MP157) by adopting the cost-optimized point-to-point topology.

How It Works

In a standard DDR3L design, VTT is required to terminate the address/command (A/C) bus and reduce signal reflections. However, in a point-to-point topology with a single DRAM, the transmission line stubs are eliminated, making on-board termination unnecessary. Instead, the reflections are controlled via 33 Ω series resistors on every A/C signal, which act as source termination.

Key Design Rules to Follow

  • A/C bus — point-to-point connection, no on-board termination, 33 Ω series resistors on each signal (can be removed if the DDR is placed very close to the SoC)

  • CLK_N / CLK_P — terminated differentially with a single 100 Ω resistor (no VTT needed here either)

  • Data bus (DQ, DQM, DQS) — standard point-to-point, no termination required

Power Sensitivity Benefit

Eliminating VTT is a significant win for power-sensitive designs, since VTT typically mirrors half the VDDQ voltage and can draw tens to hundreds of mA dynamically during bus activity. Removing it reduces both BOM cost and standby/active power consumption.

Important Caveats

  • This topology is only valid for a single DDR module as soon as you add a second chip (x32 or dual-rank), you reintroduce stubs and will likely need termination again

  • Placement still matters: keep the DDR3L as physically close as possible to the STM32MP1x to minimize trace lengths and benefit from removing the 33 Ω resistors entirely

  • Always validate signal integrity with your specific PCB stackup, especially if traces exceed a few centimeters

For more details on DDR topology and cost-optimized designs, please refer to AN5692 available on www.st.com.

Best Regards,
Zakaria