STM32 MCUs Products

Hi I'm using STM32G0B0RET6, and im using ADC Channel 1,4,5,6,7,10,11,15, and 16 . and sequencer is set to not fully configurable because if set to fully configurable then i can't use Channel 15 and 16.So here for all ADC channels i'm getting same values, can anyone help me resolve this issueInitiated like this HAL_ADCEx_Calibration_Start(&hadc1);andthis my ADC reading part HAL_ADC_Start(&hadc1);HAL_ADC_PollForConversion(&hadc1, 200);chanel1 = HAL_ADC_GetValue(&hadc1); //MDB 4 Vout sense HAL_ADC_PollForConversion(&hadc1, 200);chanel4 = HAL_ADC_GetValue(&hadc1); //Vcharge sense HAL_ADC_PollForConversion(&hadc1, 200);chanel5 = HAL_ADC_GetValue(&hadc1); //MDB 3 Vout sense HAL_ADC_PollForConversion(&hadc1, 200);chanel6 = HAL_ADC_GetValue(&hadc1); //MDB 2 Vout sense HAL_ADC_PollForConversion(&hadc1, 200);chanel7 = HAL_ADC_GetValue(&hadc1); //MDB 1 Vout sense*/ HAL_ADC_PollForConversion(&hadc1, 200);chanel1

I am using the debugging mode in STM32CubeIDE, and the compilation result shows that there is insufficient RAM.27_Touch_Appli.elf section `.bss' will not fit in region `RAM'region `RAM' overflowed by 94904 bytes 

hello, I have a can bus with 2 node (one STM32G0B1 with SN65HVD1050DR  transcriver and one esp8266 with MCP2515 module) that comunicate over canbus at 1Mbps.I am trying to add a third node, it is a blue pill STM32F103C8T6. The chip onboard looks genuine (i have also tested the usb double buffer on it and it works) but who knows...Transcriver attached to STM32F103 is a SN65HVD1050DR, as for the G0B1.The problem is, whith STM32F103 i see only messages coming from STM32G0B1 (and not from the other node on bus), and it looks like it is not sending messages (other nodes on the bus don't receive also if they are accepting from any id). My ideas are: 1- fake chip, so canbus will never work properly, 2 - bad code.Here are relevant code parts for STM32F103, do you see errors (i am quite new to C programming)?With this code, the main loop run for some seconds (circa 10) than it enter in Error_Handler function, if i activate the AutoRetransmission it happen

I am using an STM32H757 for a composite USB device with a ULPI HS PHY. I am streaming video data to the device via an OUT endpoint from the host PC (Windows 11). Streaming can be successful for more than 15 minutes but then the host suddenly stops sending packets. Each individual packet is 512 bytes. A typical sequence captured by a USB analyzer is:    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)    OUT txn        OUT packet (3 B)        DATA1 packet (515 B)        ACK packet (1 B)If the device is not ready to receive the packet, then the DATA1 packet is NAKed by the device and the host responds with a PING to see when the device is ready. In this case, the sequence looks like this:    OUT txn (NAK)        OUT packet (3B)        DATA1 packet (515 B)  &nbsp

Hi, On STM32G071CBU6, when PB15 is used as CC2 with DBCC2 shorted to CC2, does the ROM bootloader ever drive PB15 as SPI2_MOSI, or does the CC/dead-battery own the CC2 pin and that path always takes priority? This detail is critical for our design because the device is bus-powered and relies on the dead-battery path to manage initial power-up. If the bootloader were to override PB15 and drive it as SPI2_MOSI while the flash is blank, it could cause a power drop when the ROM bootloader starts. I checked the datasheet, reference manual, programming manual, and bootloader manual, and none of them explicitly state how the ROM bootloader handles SPI2_MOSI when that pad is also CC2 with DBCC shorted. Could you please clarify? Thanks

Hi,I am experiencing issues with UART single-wire (half-duplex) communication on an STM32H723. The UART handler reports error code 4 (frame error). I have tried a wide range of configuration settings without success.The same setup works correctly on an STM32F439, but not on the H723. Do you have any suggestions on what I could try or what might be causing this behavior.BR 

I'm currently looking at something like thisSTM32N657A0But they sell a non AI accelerator version STM32N655A0Is there any benefits to using the non AI version of the chip.  Other then saving a few dollars on the chip? 

I'm using ADC with DMA in a large project, and faced some very strange problem: If I'm using DMA2 Channel 6 - ADC works correctly If I'm using DMA2 Channel 1 - the SW end up in Hard Fault The configuration is default. This is how I start the conversation  HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); // Start the ADC in DMA mode HAL_ADC_Start_DMA(&hadc1, (uint32_t*) g_ADC_values, ADC_BUFFER_LENGTH);

Dear, I'm using a STM32G0B0RET6 as MCU and I encouter a bug on GPIO external interrupt specifically on PC14. Configuring as external IT on rising edge, it works correctly and the interrupt is generated only on rising edge.Configuring as external IT on falling edge, an interrupt is generated 2 times, 1 on falling edge and 1 on rising but both call the HAL_GPIO_EXTI_Falling_Callback callback.Configuring as external IT on falling and rising edge, an interrupt is generated 3 times (consistent with previous configurations).Configuring this pin (PC14) as external interrupt on falling edge generates a falling interrupt on rising edge.(I precise I checked EXTI registers and they are correctly configured) If I do same tests on PC13, all work correctly. ITs are generated in accordance with the configuration. A workaround is to the check the state of this pin in the interrupt callback but it seems to be a bug. (and I saw nothing in the errata sheet)

Hi, in this STM32L4Q5RGT6 microcontroller of (LQFP48) package how many SPI, QSPI should be connected.

Hello I am forced to erase the entire flash page when I write into an address of the flash page. Why is that? I have never used this page... I understand that if the flash has been already used, it cannot be rewritten... but why when the page is always '1'?Thanks a lot.   Edit 1:UsageFault: An instruction executed with an invalid EPSR.T or EPSR.IT field. UsageFault: The processor has attempted to execute an undefined instruction. MemManage: The processor attempted a load or store at a location that does not permit the operation. MemManage: The processor attempted an instruction fetch from a location that does not permit execution. HardFault: A BusFault has occurred on a vector table read during exception processing.

I'm using a stm32G0 with a UCPD and i'm trying to figure out if the Dead battery pin have any other benefit then just saving the need for 2 resisters on the board.   From my understanding i could create the same functionality of the dead battery pin by just connecting the CC lines to ground with a 5.1K resister.  

I have configured the comparator 2 PB6 on the STM32G071RB Nucleo board. It is configured for rising edge interrupt.  As soon as HAL_COMP_Start is called on the COMP you can see the EXTI rising edge interrupt flag immediately go high. (well not immediately, it happens when HAL_COMP_Start is in its startup wait loop so presumably as soon as the COMP peripheral physically starts up.) This happens even if I change it to falling edge but I guess that should be expected. but certainly not reliably both!It seems that this is how the MCU works as I can't find any obvious mistakes in the LL or HAL driver startup function. I have seen several posts to this effect over the last 4-5 years with 1 to 2 replies but no solution.  I think the reference manual needs to mention that this will happen as it seems to be an MCU behavior. Is it only the G0?The COMP output also triggers. But the input does not move. My guess is that when COMP is activated the initial value of the negative input

I have an STM32F4227 that identifies its USB port to a host PC and all information looks correct but no data is sent or received. Looking with the debugger the microcontroller is running task scheduler but does not recognize messages being sent. Is there a register i should be looking at to determine if the USB interface is indeed operating correctly? That it would identify itself but not be able to detect any messages?

During RTC init when RTC_EnterInitMode is called a unit sets the INIT bit of the RTC_ISR register in the HAL but when it waits for the bit set to respond it times out with the bit never being set. I have run this same firmware on hundreds of other units with no issue. If the INITF does not set is it likely due to an internal issue of the microcontroller?

Hi,I am working with STM32G491RET6 and currently implementing the ADC. I have a question regarding the ADC reference voltage.If the external 3.3 V supply is removed from the VREF+ pin and VREFBUF is disabled, does the ADC operate using any internal reference voltage, or will the ADC readings be invalid?Could someone clarify how the ADC reference behaves in this case? 

I am using STM32G491RE - NUCLEO.Similar to this post - ( https://community.st.com/t5/stm32-mcus-products/reading-data-with-brs-on-fdcan-line/m-p/745625#M266951)I implemented the function of receiving and transmitting data from the FDCAN line.I configured my FDCANs with BRS mode everything works fine, the only change that causes errors is when I switch TxHeader.BitRateSwitch = FDCAN_BRS_OFF to ON. Then the FIFO fill up like the chip is not receiving ACK with just this change.int main(void) { ..... MX_FDCAN2_Init(); FDCAN_Config(); while (1) { while (HAL_GPIO_ReadPin(BTN_GPIO_Port, BTN_Pin) == KEY_PRESSED) { ...... if (HAL_FDCAN_AddMessageToTxFifoQ(&hfdcan2, &TxHeader, TxData) != HAL_OK) { uint32_t psr = hfdcan2.Instance->PSR; Error_Handler(); } HAL_Delay(10); } }} static void MX_FDCAN2_Init(void) { hfdcan2.Instance = FDCAN2; hfdcan2.Init.ClockDivider = FDCAN_CLOCK_DIV1; hfdcan2.Init.FrameFormat = FDCAN_FRAME_FD_BRS; hfdcan2.Init.Mode = FDCAN_MODE_NORMAL;

Is this connection real?I don't think so. DCACHE implementation subchapter says:The DCACHE1 is placed on Cortex®-M33 S-AHB bus, and caches only the external RAMmemory region (OCTOSPI, HSPI, and FMC), in the address range [0x6000 0000:0xAFFFFFFF] of the memory map.Indeed, by placing a bus matrix demultiplexing node in front of the DCACHE1, S-AHB busmemory requests addressing SRAM region or peripherals region (respectively in ranges[0x2000 0000:0x3FFF FFFF] and [0x4000 0000:0x5FFF FFFF]) are routed directly to themain AHB bus matrix, and the DCACHE1 is bypassed.whereas the GFXMMU slave port is at 0x2400'0000.JW

HelloI trying to figure out what the maximum frequency is for the TRACECLK  stm32u5A9.I found this post for the stm32h5https://community.st.com/t5/stm32-mcus-products/traceclk-freq-in-stm32h5/td-p/604127does the same apply for stm32u5 were can i in that case find this information for stm32u5?Are there any pcb layout guidlines for TRACECKTRACED[3:0] 

So i was looking at the 16-bit ADC characterisics in the datasheet of STM32H723ZG. Here it says for LQFP packages, values might differ. I have LQFP 144 , and i can't find any package specific datasheets. Where can i find the information for my package. I was trying to find the maximum adc sampling rate. 

We have a STM32H725 and would like to use the RTC timestamp when entering/exiting standby but from what I understand from the reference manual this is not possible? I did run a quick test and the event doesn't seem to fire even though it works as expected when  we power it down externally so it runs only on VBAT.Before I give up and solve it a different way I came here to verify whether it was possible to do so? // Hopeful developer

Good morning,I'm developing a device with these requirements: STM32F446RET6 No internet (NTP) or GPS connection Real-Time clock, set manually (so, the less often a user has to set it, the better) Outdoor -20°C~70°C temperature range (most installations in continental USA) Ideally, we would like to get our total clock drift under 10 minutes/year (20 ppm) if possible. I created one prototype using an Abracon 32.768kHz crystal for the LSE, with two C0G 6pF load capacitors. To test the prototype, I routed the LSE to the MCO1 and measured the clock frequency as we swept the temperature from -20°C to 70°C in our temperature chamber. I measured that and compared the ppm deviation to the expected deviation given by abracon (ppm = (T-25°C)^2 * (-0.035ppm)): Time [wall clock time] Ambient Temperature [°C] measured MCO frequency [kHz] ppm deviation Predicted deviation (per abracon datasheet equation) 10:10 -20.9 32.76681 -36.3 -73.74 10:13 -20.6 32.76672 -39.1 -72.78 10:24 -11.9 32.767

Hi,I'm trying to generate a pulse of a fixed length when my application triggers it, on one of two timer outputs, depending on a boolean value. My problem is that it works only once. The first time I start the timer, I get a nice pulse, but the subsequent times I get nothing. The outputs stay low. My guess is that I need to "re-arm" the pulse generation, but I can't figure out how to do so – or if that is even the issue.My "triggering code" is here. Several code lines are probably unnecessary, but have been added out of pure deperation.void SetShutterState(bool State) { TIM15->CR1 &=~ TIM_CR1_CEN; // Stopping timer. I don't think this is necessary. TIM15->SR = 0; // Clearing status bits. Probably not necessary either. TIM15->CNT = 0; // Setting counter value to 0. Just in case - shouldn't be nevessary. TIM15->CR1 |= TIM_CR1_OPM; // Setting One Pulse Mode. I doubt that this is necessary every time. TIM15->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E; // Enabling timer o

<Moved from this thread.>Just to confirm, did anyone else got success by using: for STM32H745, to safely power the uC with just LDO no SMPS ?  

HI,I have been evaluating the DAC module of STM32H743IIT6 recently. However, the data provided in the data sheet does not specify the temperature conditions under which it was measured. When I conducted the high-temperature test at 125℃, the measured data exceeded the standards given in the data sheet. Could you please inform me of the temperature range within which the DAC values in the data sheet were measured? Looking forward to your reply!