STM32 MCUs Products

Hi, i have a project here using an STM32U575RIT6Q with an external device i have connected throught the SPI interface.The microcontroller is at 160MHz using HSE with PLL. The SPI interface is at 40MHz with SPI mode 0, nss software and 8 bits per word.The problem surges when i call the function HAL_SPI_Receive. The reception of a long frame breaks up after some received bytes and then timeouts. Due to this timeout i cannot be able to receive the whole frame.I have made some test on the NUCLEO-U575ZI-Q using the 3 SPI peripherals to check if my SPI interface has any limitation. The result is the same.Here is the configuration for the SPI interfaces:/** * @brief SPI1 Initialization Function * @PAram None * @retval None */ static void MX_SPI1_Init(void) { /* USER CODE BEGIN SPI1_Init 0 */ /* USER CODE END SPI1_Init 0 */ SPI_AutonomousModeConfTypeDef HAL_SPI_AutonomousMode_Cfg_Struct = {0}; /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 paramet

Hello,When I read though AN5200 (Getting started with STM32H7 Series SDMMC host controller), I am not sure I fully understand the statement about UHS-I mode support in Table 2. (SDMMC1 and SDMMC2 main features) as in below screenshot, The table states that SDMMC2 does not have control signals for external voltage switch transceiver, but it also states in footnote that it seems can support a transceiver with bus direction sensing without the need for direction control signals.I can not find further information in documents about how UHS-I mode on SDMMC2 is implemented, but what in the above table and the footnote implies it is possible. so I would like to ask here to confirm that1) if UHS-I mode support can be achieved on SDMMC2 port, without direction control signals, and 2) As no clock feedback input pin and direction control pin on SDMMC2 port, are these pin actually not needed in this scenario? Thus a level shifter with bus direction sensing like TXB0108 (from TI) will be

Dear ST expert,   We want to upgrade from STM32G4 to STM32H7 dual core.       - Can you please suggest how to use CORDIC in STM32H745 series? If not then what is the best way to calculate sine and cosine of float values?         - Please suggest any alternate part no which has CORDIC and dual core combination     - Is there any other consideration needed to upgrade? We want to upgrade to dual core due to high throughput FDCAN link where one of the core, preferably M7, would be used entirely to handle FDCAN.         - Do you have any library or example codes for high throughput FDCAN link?   Regards, Jitendra Edited by ST Moderator to add the right labels

I started a new STM32G0B1 project based on the example project, ADC_MultiChannelSingleConversion, and added FreeRTOS. The default task makes the same HAL_ADCEx_Calibration_Start and HAL_ADC_Start_DMA ffunctino calls as the example, starts a periodic timer to fire every 10 ms and then goes into an infinite loop where all it does it repeatedly call  osDelay(1000).Every time the timer I started fires, it calls a function that increments a counter, toggles the green, LED,makes the same HAL_ADC_Start call the example does, delays, calls HAL_Delay(1), and then checks ubDmaTransferStatus, also the same way the example does I also print out the loop counter and the computed values from the example, plus a few more for seven altogether, and then clear ubDmaTransferStatus.But if ubDmaTransferStatus is not set, I print out a line of dashes.I eliminated the blue button entirely from the project because I'm using the timer for the same purpose..Here's the issue. the fl

void HAL_FDCAN_TxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes) { extern FDCAN_HandleTypeDef hfdcan1; if(hfdcan == &hfdcan1) { // printf("tx cplt = %d\n",BufferIndexes); can_tx_cplt = 1; } } void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan) { // 错误处理 //printf("FDCAN Error Callback: ErrorCode=%lu\n", (unsigned long)(hfdcan->ErrorCode)); uint32_t error; error = HAL_FDCAN_GetError(hfdcan); if(error == 4) { can_init(); } printf("FDCAN Error = %d\n",error); } void can_send_msg(uint32_t id, uint8_t *data) { can_send_msg_len(id,data,3); } #if 1 void can_send_msg_len(uint32_t id, uint8_t *data,uint8_t len) { FDCAN_TxHeaderTypeDef FDCAN_Tx; static uint32_t can_tx_time_out_count = 0; extern FDCAN_HandleTypeDef hfdcan1; uint8_t retry_count = 0; bool flag = 0; FDCAN_Tx.TxFrameType = FDCAN_DATA_FRAME; FDCAN_Tx.TxEventFifoControl = FDCAN_NO_TX_EVENTS; FDCAN_Tx.MessageMarker = 0x00; FDCAN_Tx.Identifier = id; // 使用输入的ID FDCAN_

hii, i am using stm32 nucleo g0-b1re i am trying to receive data in interrupt mode, but cant figure out what is wrong, i am new to stm32 i2c protocol.i have used master as nucleo-h743zi2 and transmitting data, but it is not showing anything on minicom. 

Would STM32G4 performance gets effected if runs at lower voltage (1.8V)? Can the core clock run at max 170MHZ or it will run lower speed?

I am trying to configure the LPUART on my board, but appear to be getting nowhere. I've already configured the PLL to run at 110 MHz, and I changed the appropriate registers (`SW`) to use PLL as the system clock. I've tried flashing the board with Zephyr OS just to make sure that it works, and it indeed works. When I use GDB to inspect the relevant registers (the ones changed by my code below) they appear to all have the values that I expect. I can't for the life of me figure out what is going on. Using a logic analyzer, I see 0 activity on the TX pin, which is in a constant state of high. Here is my code for configuring my LPUART (I am using CMSIS). I want a baud rate of 115200, and my board is configured to run at 110 MHz.```#include <stdint.h> #include "stm32l5xx.h" void enable_lpuart1(void) { volatile uint32_t dummy; RCC->CCIPR1 &= ~(3 << RCC_CCIPR1_LPUART1SEL_Pos); RCC->CCIPR1 |= (1 << RCC_CCIPR1_LPUART1SEL_Pos); // turn on the LPU

I am using the NUCLEO-L433RC-P development board and in the process of designing my own PCB.I would like to be able to update firmware via USB, but need to make sure my PCB design allows for this.Currently I have VDDUSB connected to 3.3V, but thinking this is now incorrect.The VDDUSB pin is not rated to 5V, so I can't connect the 5V from the USB-C connector to the VDDUSB pin.Presumably the VDDUSB is used to indicate to the MCU that the USB cable is connected ?  Is VDDUSB used as a signal or for power ?Should I just use a linear regulator to convert the USB 5V to 3.3V for the VDDUSB pin ?Also, the BOOT0 pin has to be pulled high to put the STM32 into bootloader mode.Can BOOT0 be connected to a pin on the USB-C connector ?Otherwise I would need an external connector to pull up the BOOT0 pin which does not seem user friendly.  

Hey All,I hope you can help me. I'm trying to bring up my new board, which contains a STM32N657IO. Attached are the schematics. You can assume the 5V supply is working(it is after a few bodge wires). My problem is as follows. I'm trying to connect to the STM32N6 over SWD using a JLink. It seems the SWD communication with the Debug port is successful, but the communication with the core fails. I get the following output when trying to connect to the MCU:Device "STM32N657I0" selected. Connecting to target via SWD ConfigTargetSettings() start ---Setting ETM Base Address--- ---Setting TF Base Address--- ---Setting ETF Base Address--- ---Setting TPIU Base Address--- ConfigTargetSettings() end - Took 24us InitTarget() start SWD selected. Executing JTAG -> SWD switching sequence. DAP initialized successfully. Can not attach to CPU. Trying connect under reset. SWD selected. Executing JTAG -> SWD switching sequence. DAP initialized successfully. Connecting to CPU via connect under

Hello Friends,I am Using STM32F303 MCU for my FULL Speed USB  communication board. Used interrupt transfer.Board is going to use in Noisy Industrial environment.So , Planned to use Shielded USB cable with EMI Chokes ( Both Side ).Cable Length is 1.8 Mtr.I plan  to use ESD / EMI ICs on the board before the MCU like ....USBUF01W6  "OR"  USBLC6-2SC6.Any Suggestion Which would be better out of two ? Regards,Bsuthar

Hi,I am trying to use the STM32H5 CRC unit via HAL to calculate a CRC32 (ISO-HDLC) over multiple chunks.This works correctly via:hcrc.Instance = CRC; hcrc.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE; hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE; hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; if (HAL_CRC_Init(&hcrc) != HAL_OK) { Error_Handler(); } // calculate CRC32 over two identical chunks, HCRC keeps state! temp = HAL_CRC_Calculate(&hcrc, (uint32_t *)data, strlen(data)); // 0x444a273c crc = ~temp; // 0xbbb5d8c3 OK temp = HAL_CRC_Accumulate(&hcrc, (uint32_t *)data, strlen(data)); // 0x405e36b1 crc = ~temp; // 0xbfa1c94e OKNow I need to do something similiar as in https://community.st.com/t5/stm32-mcus-products/hal-function-crc-accumulate-re-init-and-calculate/td-p/672395: the CRC unit is shared for diff

Title shortened from:"With the STM32U545RE, unable to erase the correct Flash Bank, using HAL_FLASHEx_Erase(), when attempting to switch from Bank2 to Bank1".Please keep the title short. Testing is done with the Nulceo-U545RE-Q board having 512KB Flash organized in two Banks. Each Bank has 32 pages of 8KB each. Flash Bank1: 0-31 pages. Flash Bank2: 32-63 pages. I could switch-over from Firmware-Version1 executing in Bank1 to Firmware-Version2 executing in Bank2. I verified that Firmware-Version2 was executing correctly even after hardware reset and power cycle.Attempting to switch-over  from Firmware-Version2 executing in Bank2 to Firmware-Version3 executing in Bank1 fails as I end up erasing the Bank with the currently executing software(Firmware-Version2). I checked the setting of the SWAP_BANK bit and then erased the Bank, using the code below:  /* Get the boot configuration status */ HAL_FLASHEx_OBGetConfig(&OBInit); /* Check Swap Flash banks statu

I came across a discrepancy between two ST documents regarding the behavior of an IWDG reset on STM32H5 devices, and I’d like clarification on what exactly is reset when an IWDG event occurs.Document 1: UM3150 Rev 2 – STM32H5 Safety Manual, Table 9 (CPU_SM_6)States that the IWDG reset may result in an "incomplete" local safe state — it only resets the CPU and does not guarantee that application software can bring the system to a final safe state. This implies that I/O and peripherals may not be reset. Document 2: RM0481 Rev 2 – STM32H562/63xx Reference Manual, Section 11.3.2States that an IWDG event results in a system reset, and all registers (except RCC_RSR and Backup domain) are returned to their reset values, which implies that peripherals and I/O should also reset.Can ST clarify this apparent contradiction? Does the IWDG event reset only the CPU (as per UM3150), or the entire system including I/Os and peripherals (as per RM0481)? 

Hi all.I have a small problem understanding the timer 16 of the STM32G030K6T6 microcontroller. According to the data sheet, it should use the TIMPCLK clock, which corresponds to the PCLK clock.My system clock is supplied by the HSI (SYSCLK = 16 MHz). I have set my AHB prescaler to 4 and the APB prescaler to 1, so HCLK = PCLK = 4 MHz. Since my APB prescaler is equal to 1, the timer clock should be TIMPCLK = PCLK = 4 MHz.I then implemented a delay function with timer 16. So that the counter runs up in 1 us steps, I have to set the prescaler of the timer to 15 instead of 3. This means that the timer 16 still has a 16 MHz signal as an input signal.Now my question is: Have I misunderstood something here, is the data sheet wrong or is my code not correct? I have attached the quotes from the data sheet and my code. I hope you can help me.  Datasheet RM0454 Rev 5:"Timer clockThe timer clock TIMPCLK is derived from PCLK (used for APB) as follows:1. If the APB prescaler is set to

I’m working on a custom board with an STM32F446REt6 and a USB Type-C 2.0 connector (GCT SB4105-GF-A). I haven’t implemented any external pull-up on the D+ and D- lines, but on the CC1 and CC2 pins I have 5.1k pulldown resistors. I managed to load the firmware via DFU and Windows recognizes the device without any issues — the firmware upload works perfectly. However, when I try to use the Virtual COM (CDC), Windows returns an error saying “Unknown USB device (Device descriptor request failed).” I’ve already installed the ST USB drivers but nothing changed. In my .ioc project I enabled USB_OTG_FS, then in middleware I enabled USB_Device and selected Virtual COM. I tried leaving the device descriptor at default and also modifying it, but the issue persists.Given that DFU works perfectly, I assume the hardware is fine, and the problem is somewhere in the firmware configuration?I’m attaching the USB schematic section below. Has anyone experienced something similar? Any suggestions on what m

I want to route the internal comparators on the STM32G0B1 to the inputs of the encoder module. I can't find a way to do this in CubeMX. When I select "Encoder Mode" in the timer configuration, there is no option to route the comparators to the timer. Is this configuration possible?

Hi ST team,I'm working with the STM32U5-DK2 board and implementing USB Device MSC class using USBX and external flash (via OSPI) as storage. Everything works fine when VBUS sensing is disabled in STM32CubeIDE — the host detects the device correctly as a USB MSC device.However, when I enable VBUS sensing in CubeIDE (i.e., "Device Only" mode), the USB device is not detected at all by the host (no enumeration).Questions:Why does enabling VBUS sensing prevent the device from being enumerated as a USB MSC device?What are the minimum required CubeMX configurations to support VBUS-based detection (using PA9), but without using UCPD or USB PD features?Is there any internal pull-up or alternate pin setting that needs to be done for PA9 in this context?Is there any known erratum or additional hardware jumper/settings specific to the DK2 that could affect VBUS sensing?Any guidance to make VBUS-based detection + USBX MSC work reliably (without relying on UCPD/PD) would be greatly appreciated.Thank

Hi I am trying to achieve output compare mode in TIM1 in stm32f407vgtx board . I am trying to generate a delay of one ms and running a timer clock at 1mhz after divide it with prescaler. I have enabled upcounter,TIM_CCER_CC1E bit in CCER, TIM_EGR_CC1G bit and loaded CCR1 as 999(one ms) and ARR as 0xFFFF but my counter is exceeding the value and it is going upto 65535 which is the ARR value . I have not configured OC1M[2:0]bit (capture/compare mode register 1 (TIMx_CCMR1)) as I am not toggling PA8 or any thing on that pin which is linked with TIM1_CH1.  I want when ever counter value matches CCR1 it generates interrupt and I am toggling led inside that IRQ handler. Can you help me where I am wrong please. B.R Ashish

Hello,I'm using LPTIMR1 to wake up from STOP2 mode and then use ADC to read battery voltage range from 10 - 15 V. The wakeup to use ADC is random as per user input (in seconds, minutes or hours).static void MX_ADC1_Init(void) { ADC_ChannelConfTypeDef sConfig = {0}; hadc1.Instance = ADC1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV4; hadc1.Init.Resolution = ADC_RESOLUTION_12B; hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE; hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc1.Init.LowPowerAutoWait = ENABLE; hadc1.Init.LowPowerAutoPowerOff = ENABLE; hadc1.Init.ContinuousConvMode = DISABLE; hadc1.Init.NbrOfConversion = 1; hadc1.Init.DiscontinuousConvMode = DISABLE; hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; hadc1.Init.DMAContinuousRequests = DISABLE; hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN; hadc1.Init.SamplingTimeCommon1 = ADC_SAMPLETIME_79CYCLES_5; h

Hey everybody. I had 3 STM32 F401RE for my robotic project but now I got "no stlink detected" error. Once I turned my computer off with shot down and then on again I couldn't get stm32 to work again, that's why one of them went away, the other one was when I turned the driver on and off while the stm32 was connected to the stepper motor driver and then it went away, i don't remember the other one. My first question is are these stm32s completely broken, can i save them? My second question is if they are completely gone, how can i save my next purchases?

Hi, I am using stm32f46-disco working with client for TCP server, my problem is when I start with one client it works successfully but when I connect another client (also stm32f746-disco) it receives data slower than the previous client and swaps with the first client (meaning the first client now receives data slower than the second client). Do you know this problem?/* * ethernet.c * * Created on: May 3, 2024 * Author: ACER */ #include "ethernet.h" #include "../element/element.h" #include "../user_eeprom/user_eeprom.h" #include "lwip/tcp.h" #include <string.h> #include <stdarg.h> extern struct netif gnetif; static err_t ERROR_DEBUG; // debug static struct tcp_pcb *user_pcb; char CurrentState[32]; char data_server[32]; char tcp_ip[64]; static err_t user_config_server(void *arg, struct tcp_pcb *newpcb, err_t err); static err_t user_poll_callback(void *arg, struct tcp_pcb *pcb); static err_t user_recv_callback(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err);

Greetings Everybody,I have Nucleo-F207ZG board. I want to try RTC feature of this STM32. In past i did try using RTC but after some days the time used to drift and it was like 4 seconds ahead than actual time after on week and after 1 month time was ahead like almost 15 seconds. If you have any step by step procedure of RTC smooth digital smooth calibration then please share. I have gone through various application notes but i am getting more confused... Please help me.

I've got a program running on a dual-core STM32 (the STM32H747IGT6 if you're curious) and right now it's doing a pile of SCB_CleanDCache_by_Addr() and SCB_InvalidateDCache_by_Addr() to keep shared memory in sync between the CM4 and CM7. I was thinking it would be easier if I just set the shared area to non-cacheable, but when I configure the MPU the system will work for a few seconds and then hang.The shared memory area is called 'buffer_control' and I padded it to 512 bytes. My MPU configuration looks like this:SCB_EnableDCache(); SCB_EnableICache(); /* Disable the MPU */ __DMB(); /* Make sure outstanding transfers are done */ SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; /* Disable fault exceptions */ MPU->CTRL = 0; /* Disable the MPU and clear the control register*/ /* Configure the MPU attributes as WB-WA for SRAM */ MPU->RNR = MPU_REGION_NUMBER0; MPU->RBAR = (uint32_t)&buffer_control; MPU->RASR = ((uint32_t)MPU_INSTRUCTION_ACCESS_DISABLE << MPU_RASR_XN_P

Hello everyone, we are using STM32L152RBT6A for our development. Our PCB has a battery and we use the RTClock, no matter of the way of work - frequent power  Off/ On.           We kindly request some help in using „80 byte backup register“ like an energy independent memory, as we don't find any other suitable parameter in our processorHas anyone tried using this memory?Thank you in advance