STM32 MPUs Embedded software and solutions

We created the project for the M4 with CubeMX. We use FreeRTOS with CMSIS_V2 and OpenAMP as Middleware.We assigned TIM1, TIM2 and TIM3 to the M4 and use TIM1 as SYS Timebase Source.The program runs fine if started with fw_cortex_m4.sh or with the SW4STM32 menu "Run As".But if we try to debug with "Debug As", osKernelStart returns osErrorISR in both Engineering and Production mode. But osKernelStart is in the main function. Also if we create a Mutex it returns NULL. Both functions "fail" on IS_IRQ.This is a very similar question. From there i used the code to read the IPSR, it is already 41 at the beginning of the main function.If i don't initialize TIM1 so that no interrupts from TIM1 can occur IPSR is 14 at the start of main.If i apply the "patch" from this question IPSR is 0 but the creation of RPMsg channels with VIRT_UART_Init fails with:[ 3044.562749] virtio_rpmsg_bus virtio0: creating channel rpmsg-tty-channel addr 0x0 [ 3044.568797] virtio_rpmsg_bus virtio0: channel rpmsg-tty-ch

I have the M4 core using a UART core to send and receive data using DMA. This works just fine but over time after 30-60min the core crashes/locks up and reinitializing the UART channel does not help at all it actually crashes the sytem. Under normal operation the reinitialization sequence works properly. The only thing I can get debug-wise is the gState which shows up as 0x21, and the state never changes after the lock-up. Reloading the m4 firmware from a7 side does not help and the UART core is broken until I do a system reboot.Under normal operation, I do get the UART error callback triggered and the error code is 0x10, but the tx and rx continue to work without any action required.Is there any sequence for resetting the UART physical core to recover without a reboot? Are there any known reasons why the UART core would lock up after extended use?

I am trying to configure a DMA stream to capture the RX channel of a UART core on the m4, however, I get very undesirable behaviour.I am trying to set up a circular rx buffer that is of size 10 since the data coming back is of multiples of 5. Unfortunately, I don't get the trigger at half full for many seconds, and when I finally deinit the uart and DMA and abort any tx or rx the half transfer complete callback finally comes.If I change the dma receive size to 8 I get the trigger at half full (4), so is there a limitation or alignment problem?static void MX_USART3_UART_Init(void) {   /* USER CODE BEGIN USART3_Init 0 */   /* USER CODE END USART3_Init 0 */   /* USER CODE BEGIN USART3_Init 1 */   /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; huart3.Init.BaudRate = 2500000; huart3.Init.WordLength = UART_WORDLENGTH_9B; huart3.Init.StopBits = UART_STOPBITS_1; huart3.Init.Parity = UART_PARITY_NONE; huart3.Init.Mode = UART_MODE_TX_RX; huart3.Init.Hw

Hi,We are using stm32mp157c MCU/board and it has DSI output built-in. Now we want to add display port support via DSI to eDP bridge SN65DSI86. It seems that stm32 does not support Displayport output or it has never been done. At least the driver dw_mipi_dsi-stm.c should be updated not to require a panel. Any idea how this can be achieved please?

Hi, we using the STM32MP157 custom board in this we are developing the bare metal drivers for the all the peripherals. Now we are able to send and receive the character on UART4 perfectly. But when we are configuring for the interrupt mode it's only forwarding the Rx event till GICD (pending state). But i had seen the Linux drivers for the UART4 in that wakeup event is activated i think this may be the issue. To activate wakeup event in the UART4 we need to enable the EVENT30. To enable the event30 what is the procedure. please let us know.

Hi,I am using STM32MP153a SOC.Linux kernel version is 5.4.56 (openstlinux-5.4-dunfell-mp1-20-11-12).I would like to generate square signal of 50-200 uS on a certain GPIO every 40 ms using Linux kernel.Also ,at this point I need to read certain registers.What are my options? If there is already an example/application note on the subject,please let me know.I was looking into these options:1)I have already a working timer on my system,which is arm arch timer.It's already generating interrupts ( I can see that number of interrupts is increasing in /proc/interrupts).The question is how do I configure it to generate interrupt every 40 ms and I how do I generate callback to have my registers reading.2)TIM6/TIM12 -STM32 timer.As far as I could see,current examples - pwm,counter,trigger ,does not fit my needs , since they don't have any form of periodic interrupt.PWM example is the closest to what I need - it possibly could generate a signal that I need,but it doesn't have an option to have an

I noticed that some ST Cpus support large amounts of RAM. Does this mean that they would run Linux, too. Are there any demo boards and such. Our volumes are 100-400 per year, if we ever start building our own Linux boards.

I cannot make the Ethernet work on my custom board (STM32MP153CA + automotive Ethernet PHY NXP TJA1101) in U-BOOT (haven't even tried loading kernel). The PHY is connected to an external 25MHz xtal. I'm working with 5-10-dunfell-mp1-21-11-17 files included on the 3.1.0 ecosystem. I tried the ecosystem 4.0.1 but got panic errors with RNG, UARTS, etc. After a few days I gave up and went back to 3.1.0After U-Boot finishes loading, I configure the ethaddr, ipaddr, gatewayip, netmask and serverip, but whatever command I send I got straightaway:STM32MP> ping 192.168.1.6--- net_loop Entry--- net_loop UDP handler set (00000000)--- net_loop ARP handler set (00000000)--- net_loop timeout handler cancelledTrying ethernet@5800a000eqos_start(dev=ddf05618):eqos_start_clks_stm32(dev=ddf05618):clk_enable(clk=ddf07290)stm32mp1_clk_enable: id clock 105 has been enabledclk_enable(clk=ddf072b0)stm32mp1_clk_enable: id clock 104 has been enabledclk_enable(clk=ddf072f0)stm32mp1_clk_enable: id clock 103 ha

Hi, and yet another question...We would like to perform electrical compliance testing on our USB ports. This requires each port to send a test pattern.Our board has one upstream and two downstream facing ports. The upstream port can be set into various test modes using a standard tool (USB xHSETT). Unfortunately, this is not possible for the downstream ports.Can you give me any advice, how to set a usb host port into the TEST_PACKET test mode?Regards

Hi,We are using Stm32mp157a processor in my custom board.We are trying to work on dac with DMA but it is not working.You can see my configurations below.In cube mx for DAC there is no Dma option.so we added DMA manually with reference Stm32mp1 Uart Tx DMA.2.When we do with reference of Stm32mp1 UART TX DMA we are getting DAC request in DMAREQ_ID[6:0] in DMA_MUX CR register and source and destination address and Data size we are able to see.But unable to get DMA IRQ.How can i Resolve this. And one more thing how can i trigger DMA through Software?

Hello , I am trying to configure RX (only) with dma. I am using DMA2 stream5 on usart3 I have connected USB to UART bridge (4 wire) on 40 pin headers RX,TX,VDD(3) and GND on CN7. Whenever I am trying to send any data from the comport (teraterm ) from windows PC , nothing happens (on the RX side) on the CM4 of MPU.My code :   /* Peripheral clock enable */  __HAL_RCC_USART3_CLK_ENABLE();  __HAL_RCC_GPIOB_CLK_ENABLE();  /**USART3 GPIO Configuration  PB10   ------> USART3_TX  PB12   ------> USART3_RX  */  GPIO_InitStruct.Pin = GPIO_PIN_10;  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;  GPIO_InitStruct.Pull = GPIO_NOPULL;  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;  GPIO_InitStruct.Alternate = GPIO_AF7_USART3;  HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);  GPIO_InitStruct.Pin = GPIO_PIN_12;  GPIO_InitStruct.Mode

I was wondering if its possible to directly flash the STM32MP1 using UART using the STM32CubeProgrammer ? if so are there any tutorials that can be followed ?

I followed the steps to install the mongodb from the openSTLinux distribution.when I run the mongodb from the terminal, it is crashing with the bus error.root@stm32mp1:/usr/bin# mongodBus error (core dumped) Appreciate your help..

Hi, Is there any way to give a more meaningful name to a serial port with the device tree, so that is shows up in the linux kernel?Right now, in a device tree, it is possible to choose an alias in the alias node. But they do show up as ttySTMx in the /dev directory.Is there a way to make it work so that it gets a more intutive name like rs232? For my specific layout some serial ports are connected to a specific interface./ {   aliases { serial1 = &usart1; }; }; /*root*/ // Instead / { aliases { rs232 = &usart1; };   }; /*root*/

Hi,I was following the instructions from the ST wiki (How to build kernel for Android) on how to build the android kernel, however, on the last step, when instructed to build the final android images (make -j) I get the following error:"Cannot extract kernel configs in out/target/product/eval/kernel"I am attempting to build without any configuration changes or modifications to the kernel.

Hello, Please tell me how to write DeviceTree to use GPIOF6 ~ 11 and GPIOG10 ~ 15.​When I checked the status after u-boot and kernel boot, it became as follows.The ports that can be used when creating and compiling DeviceTree are GPIOF0-5 and GPIOG0-9, and it seems that there is no definition after G10.I don't know the cause.

I'm not sure if this is a bug, but STM32CubeMX assumes GPIO is input while using LL library? And is not configuring it to be Input ?I found that I had to force to configure the pin as Input so it will work with external interrupts.

Hi All,What is the best way to switch an SPI from Slave to Master during run time and later to bring it back to Slave mode (an example will be well come :-))Thanks,Yoav

We are doing a custom board bring-up and currently trying to display video on our display device. We use CubeMx to generate the device trees for our project, we have configured the DSI PLL dividers to match our display device requirement. Snapshot of the configuration is shown below.In the device tree's rcc node, we do see the CLK_DSI_DSIPLL, however we are not seeing these divider information.The clock configurations for rest of the peripherals are reflected in the device tree, also the clock dividers to generate DSI pixel clock are present in the rcc node and in the target's clock summary dsi_px clock shows the configured clock frequency. The clock configurations for DSI lane clock is not seen in the device tree and also in the target it shows 200MHz instead of a 174MHz when measured. Are we missing anything here? Where is the DSI PHY configurations in the device tree?

Hi all,   I am trying to flash a custom board based on stm32mp157c based MPU. I have my own flashlayout which is also attached here.   I am constantly running into the following error.   an error occured while setting virtual partition 0xF1 alternate setting Full error log and device tree attached. Any leads are highly appreciated.

Hi,I am puzzled which DMA channel to use to read from an FPGA connected to the FMC.Using the dmatest module I found out which are free and can be used for DMA_MEMCPYtransfers:modprobe dmatest timeout=2000 iterations=1 run=1 wait=1 [ 991.821537] dmatest: No channels configured, continue with any [ 991.826830] dmatest: Added 1 threads using dma0chan19 [ 991.831372] dmatest: Added 1 threads using dma0chan20 [ 991.836463] dmatest: Added 1 threads using dma0chan21 [ 991.841513] dmatest: Added 1 threads using dma0chan22 [ 991.846879] dmatest: Added 1 threads using dma0chan23 [ 991.851588] dmatest: Added 1 threads using dma0chan24 [ 991.856713] dmatest: Added 1 threads using dma0chan25 [ 991.861707] dmatest: Added 1 threads using dma0chan26 [ 991.867050] dmatest: Added 1 threads using dma0chan27 [ 991.871733] dmatest: Added 1 threads using dma0chan28 [ 991.876972] dmatest: Added 1 threads using dma0chan29 [ 991.881975] dmatest: Added 1 threads using dma0chan30 [ 991.887247] dmatest: Added 1 t

Hi all,I am trying perform build for yocto for the DK2. But running into the following error. I am pretty sure this was working until a month back but now link appears to be broken. ERROR: openocd-stm32mp-native-0.11.0-rc2.AUTOINC+a5e526d857-r0 do_fetch: Fetcher failure for URL: 'git://repo.or.cz/git2cl.git;destsuffix=git/tools/git2cl;name=git2cl'. Unable to fetch URL from any source. ERROR: Logfile of failure stored in: /home/ubuntu/STM32/yocto-test/openstlinux-5.10-dunfell-mp1-21-03-31/build-openstlinuxweston-stm32mp157a-730isom-dsi-emmc-mx/tmp-glibc/work/x86_64-linux/openocd-stm32mp-native/0.11.0-rc2.AUTOINC+a5e526d857-r0/temp/log.do_fetch.1136774 ERROR: Task (virtual:native:/home/ubuntu/STM32/yocto-test/openstlinux-5.10-dunfell-mp1-21-03-31/layers/meta-st/meta-st-stm32mp/recipes-devtools/openocd/openocd-stm32mp_0.11.0.bb:do_fetch) failed with exit code '1'Any idea how to fix this?

Hello,I been working on stm32mp1 soc. In m4, totally, i have configured 3 timers(Timer2(input capture), time13,timer16). when i start the m4 from A7 after Linux login, all timers work fine. But when I use a startup script to start the M4 during Linux bootup, input capture(TIM2) does not work but other timers are working fine. I want m4 timers to work when m4 starts during Linux bootup. I am looking for some suggestions to understand and solve this issue. Thank you in advanceJS

Hi!The repository git://repo.or.cz seems to be permanently offline.Alternatives are:https://sourceforge.net/p/openocd/code/https://github.com/openocd-org/openocd/Broken recipes are:layers/meta-openembedded/meta-oe/recipes-devtools/openocd/openocd_git.bblayers/meta-st/meta-st-stm32mp/recipes-devtools/openocd/openocd-stm32mp_0.11.0.bbI may be able to provide a patch if wanted. But its not completed.Best regardsGunther

Hi,We are using stm32mp157a in our custom board.We are configured SAI for Cortex M in cubemx.But we are unable to get dma interrupt and data through DMA. you can see my code flow below.In main.we are calling below functions.int main(){ MX_DMA_Init(); MX_SAI2_Init(); HAL_SAI_Receive_DMA(&hsai_BlockB2,(uint8_t *)AUDIORecvBuf,BUF_SIZE);while(1){}}1.SAI intializationstatic void MX_SAI2_Init(void){ /* USER CODE BEGIN SAI2_Init 0 */ /* USER CODE END SAI2_Init 0 */ /* USER CODE BEGIN SAI2_Init 1 */ /* USER CODE END SAI2_Init 1 */ hsai_BlockA2.Instance = SAI2_Block_A; hsai_BlockA2.Init.Protocol = SAI_FREE_PROTOCOL; hsai_BlockA2.Init.AudioMode = SAI_MODESLAVE_RX; hsai_BlockA2.Init.DataSize = SAI_DATASIZE_16; hsai_BlockA2.Init.FirstBit = SAI_FIRSTBIT_MSB; hsai_BlockA2.Init.ClockStrobing = SAI_CLOCKSTROBING_FALLINGEDGE; hsai_BlockA2.Init.Synchro = SAI_ASYNCHRONOUS; hsai_BlockA2.Init.OutputDrive = SAI_OUTPUTDRIVE_DISABLE; hs