STM32 MCUs Products

Hello.. I'm designing a project using STM32F767 that upgrades firmware using USB Host 2.0. Could anyone advise on the following:1. any application notes regarding the hardware pin connection, schematic diagram or any EVK board?2. should i use USB_OTG_HS_DP, USB_OTG_HS_DM, USB_OTG_HS_VBus?3. Should i use the 4 wire USB female connector? with these pins VCC, D+, D- , Gnd? Please advise soon, thx woldes

Hello everyone, I encountered a problem while using the STM32H750 MCU. The hardware environment is STM32H750 + USB3300, which is used as a USB HOST HS to collect camera data. An LTDC interface is used to connect a TFT-LCD for display. An external SDRAM of 32MB is expanded, with a bus width of 16 bits.  Currently, when both the camera data and the LCD frame buffer are in the internal RAM, the MCU works normally. However, when the LCD frame buffer is placed in the external SDRAM, the USB HOST fails to work properly.

Hi everyone,I'm encountering an issue with the reset cause on my STM32H723VE microcontroller.Whenever I perform either a software or hardware reset, the RCC->RSR register does not retain any value—it always reads as zero.Here’s what I’ve observed using Ozone:If I set a reset breakpoint, execution halts immediately after the reset, as shown in the image below. However, if I set a breakpoint at the first instruction of the Reset_Handler, and then press "Run", execution stops correctly—but by that point, the RCC->RSR register has already been cleared and reads all zeros. Has anyone else encountered this behavior? Could something be clearing the RSR register very early in the boot process, even before entering main?Any insights would be appreciated.Best Olaf

Hello.I am using STM32F745 to write to FLASH, but the write fails and the ERSERR flag is set.However, this ERSERR flag is*(__IO uint32_t*)0x080C0000 =data; /* (4) */*(__IO uint32_t*)(0x080C0000+4) =data2; /* (4) */If you comment out this part, it will not set.Why does the flag not set during erase operations, which should cause an erase error, but instead set during write operations?By the way, when only FLASH unlock and FLASH erase operations are performed, the selected sector is erased normally.I am seeking a solution to ensure that write operations to FLASH are performed normally.#define FLASH_SR_BSY (1 << 16) #define FLASH_SR_EOP (1 << 0) #define FLASH_CR_LOCK (1 << 31) #define FLASH_CR_SER (1 << 1) #define FLASH_CR_SNB (0x7 << 3) #define FLASH_CR_STRT (1 << 16) #define FLASH_CR_PG (1 << 0) #define FLASH_CR_PSIZE (0x3 << 8) void FLASH_UNLOCK(){ while ((FLASH.SR & FLASH_SR_BSY) != 0); if ((FLASH.CR & 0x80000000) !=

Hi, I am looking for the offline programmer and adaptor required to program STM32H753VIH6.

Hello all, I want to ask you that is any microcontroller in STM32 series which gives the 5V digital output .. I'm using STM32F746ZGT6, that gives 3.3V as digital output.. I want 5V digital output from microcontroller.. if somebody know then please suggest me .. 

I'm designing a power supply for an STM32H745. I have a 28V source and was planning to implement two buck convertersthe first regulates from 28V to 3.3V and supplies the Vdd railthe second regulates from 3.3V to 1.15V and supplies the Vcore railHowever, this seems to violate the power rail sequencing requirements of the STM32H745. I'm having a little trouble deriving the exact requirements from the datasheet and "Getting Started Guide" (AN4938), but the following excerpt makes me think that if I'm bypassing the internal LDO and driving Vcore externally, the Vcore rail must come up before the Vdd rail: My questions are 1. Is it true that if I'm driving Vcore externally and bypassing the internal LDO, that the Vcore rail must come up before the Vdd rail?2. In this case, would my best solution be to just hold the device in reset until the 1V15 rail comes into regulation, perhaps with a comparator driving a FET that pulls down on the RST pin? I'm also open to just implementi

Hello... i recently downloaded STM32 example from ST website,  How can i load these example into CubeIDE ?

I am currently evaluating the STM32G0 series for a project that requires two USB Type-C ports.Each port needs to support both Dual Role Port (DRP) functionality and DisplayPort Alternate Mode (DP-Alt).Can the STM32G0 be implemented?

Hi guys, sorry if I'm posting this in the wrong area.I'm starting a project that uses a 1024x768 graphics display and I was wondering which STM32F MCU  (LQFP 176pin) would be the better to drive the RGB Panel. I would be using external memory but if there is a MCU with internal memory that can display 1024x768 that would be easier and would make the project cheaper as well.Can you please let me know as soon as possible as at this stage I'm doing the research on what I need before I purchase all the parts.Thanks guys and hope to hear from you soon.Peter 

Hi @st_it Team,We had observed some unknown behaviour with respect to flash.MCU => STM32U073CC.Tools => STM32Cube ProgrammerWe need to write this mentioned value @last page of flash @address = 0x0803F800.After doing multiple connect/disconnect, The mentioned value got disappeared abruptly.Please refer the below after disappeared.Note - the probability of this issue occurance is much higher.Please help us to diagnose this issue.Best regards,Shubham M. 

Hi.I like to make a little spreadsheet/graphic for MCUs that shows all of the available pins and the functions available on them. You can sort of view it in CubeMX, but not in a table. Makes selecting pins and layouts easier.I do them by hand but it's a chore, especially on MCUs with a lot of peripherals. Is the data available in some form that I can process automatically? There is a table in the reference manual of each part, but it's not easy to convert to something like CSV.Thanks.

HiI'm testing a FMC connection between the mcu on a STM32H753I-EVAL2 board, and a FPGA acting as a SRAM device.Write operations looks OK, but when I try to perform a read operation, it looks like that even thought the nxe and noe behave as expected, the mcu is driving the data bus with random data, not allowing the FPGA to drive desired data.I tried various timing settings, and also changed to PSRAM, in regular and muxed mode, but nothing changed.I also turned on the MPU, with a allow all transactions setting. Can you please point me to what I'm missing here?

i have successfully make some basic module in stm32l552 nucleo in register level and in asm , successfully programGPIO, TIMER, UART RX,TX,. But stuck in interrupt section for few days. i am tring to toggle onboard led(PA9) using user button PC13. my hal code running successfully using call backvoid HAL_GPIO_EXTI_Falling_Callback(uint16_t GPIO_Pin)  &void HAL_GPIO_EXTI_Rising_Callback(uint16_t GPIO_Pin)But failed to get into ISR without using HAL. Athough EXTI->EXTICR[3] , IMR1, RTSR1 value is same as my HAL auto generated code.please help. here is my simple code......................  //user button PC13(NUCLEO BOARD MANUAL PAGE NO.33 ) input STM32L5 Series//pa9 onboard led//board : NUCLEO L552ZET6Q#include "stm32l5xx.h"volatile int userbuttoncounter; //for monitoring //void EXTI13_IRQHandler(void)void EXTI13_IRQHandler(){//if (EXTI->RPR1 & EXTI_RPR1_RPIF13) orif ((EXTI->RPR1 & (1U<<13)) != 0 ) {//clear PR flagEXTI->RPR1 |= (1U

I want to check and ensure the option bytes are correct from with my executing program. But writing the option bytes is very flaky if the IWDG is active. For some reason, there is a stall at "FLASH_CR_OBL_LAUNCH". Or maybe it makes it past but not soon after the watch dog resets the MCU and the option bytes are not written. This is an ongoing cycle forever.If I disable the IWDG then things work normally. Any idea why? void CodeProtect() { bool needsUpdate = false; // Unlock FLASH if (READ_BIT(FLASH->CR, FLASH_CR_LOCK) != 0x00U) { /* Authorize the FLASH Registers access */ WRITE_REG(FLASH->KEYR, FLASH_KEY1); WRITE_REG(FLASH->KEYR, FLASH_KEY2); } // Unlock Option Bytes if (READ_BIT(FLASH->CR, FLASH_CR_OPTLOCK) != 0x00U) { /* Authorizes the Option Byte register programming */ WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); } // --- Check and update RDP level --- uint32_t optr = FLASH->OPTR; const uint32_t c

Hello STM Community,I am currently working with the STM32C031C6 Nucleo board to implement various power reduction techniques, including Sleep, Stop, and Standby modes. At this stage, I am trying to wake the MCU from STOP mode using the RTC wakeup timer without relying on any external triggers such as the user button.While several working examples and tutorials exist for other STM32 families like STM32L4 and STM32F4, I have found that those approaches do not directly apply or work as expected on the STM32C031C6.If anyone has successfully implemented RTC wakeup from STOP mode on this MCU, I would greatly appreciate any guidance, insights, or a minimal working example to help move forward.Thank you in advance for your support!

Hello there!I am on my first foray away from HAL and into bare-metal programming, and am trying to configure LPTIM1 and LPTIM2 on my stm32u031 to periodically trigger interrupts. I am experiencing bizarre behavior that I'm struggling to understand how to troubleshoot. I have two config functions for these timers, one of them looks like:  static void configure_lptimer2() { RCC->APBENR1 |= RCC_APBENR1_LPTIM2EN; if ((RCC->CSR & RCC_CSR_LSION) == 0) { RCC->CSR |= RCC_CSR_LSION; while ((RCC->CSR & RCC_CSR_LSIRDY) == 0); } RCC->CCIPR &= ~(RCC_CCIPR_LPTIM2SEL); RCC->CCIPR |= RCC_CCIPR_LPTIM2SEL_0; LPTIM2->CR &= ~LPTIM_CR_ENABLE; LPTIM2->CFGR &= ~LPTIM_CFGR_PRESC_Msk; LPTIM2->CFGR |= (0x0 << LPTIM_CFGR_PRESC_Pos); LPTIM2->ICR = 0xFFFFFFFF; LPTIM2->DIER |= LPTIM_DIER_ARRMIE; NVIC_EnableIRQ(TIM7_LPTIM2_IRQn); NVIC_SetPriority(TIM7_LPTIM2_IRQn, 0); LPTIM2->CR |= LPTIM_CR_ENABLE; LPTIM2->ARR = 1333

Hi,I encountered a behavior contrary to Reference Manual while erasing FLASH page on STM32G473xB (128 KiB of FLASH memory).The scenario is that I use several pages at the end of FLASH for classic eeprom emulation, so there are flips between two halves for wear leveling and we need to erase some page(s) before we re-use them.I made sure DBANK=1 and all the protections are disabled (all areas start>end). Anyway if DBANK was 0, the page numbering would be the same, we only wouldn't use BKER bit in FLASH_CR and only the page size would be different.Here is related table from RM:What I observed... No problem with writes to uninitialized FLASH pages. I tried to erase the very last four pages (so in the 2nd bank) using BKER=1 and page numbers 28..31, this is described in RM as a proper way to do it, but it never worked. When I was stepping the code (the code is pretty simple and straight-forward) in the debugger, there was absolutely no problem indicated in FLASH_SR, the operation complete

Dear community,In STM32G0 or maybe in STM32 family in general, is there a possibility to disable the debug module permanently, the idea is that when the code is loaded and tested, then the next step is to disable SWD/JTAG port so that debug or loading another firmware is not possible anymore.Thank you in advance for your support.Best regardsB.T

Hello, I am designing a device that will have an STM32L4 or maybe an STM32U and will communicate with an ESP32 for internet connectivity. However, at some point, I would like to update the firmware remotely, and have the ESP32 stop executing its conventional software and act as a programmer for the STM32. Is this possible? And if so, where can I find detailed information on how to do it? I hope you can help me, thank you.

Hi everyone, I’m working on a project involving STM32L476 chip, and I’d appreciate your guidance on a few key points:Out-of-box USB flashingI'll soon have a brand-new STM32 chip that hasn’t been flashed yet, is it possible to use STM32CubeProgrammer to load firmware via USB directly — without using ST-Link or other hardware programmers? Does the internal bootloader support DFU mode by default?Software-only firmware flashingOne of our goals is to allow our in-house C# application to flash firmware over USB, without requiring any manual hardware intervention like pulling the BOOT0 pin. Is it feasible to force DFU mode or update firmware entirely via software once the chip is already running a custom firmware? Are there recommended DLLs or APIs that support this in C#?Recommended libraries/toolsIf software-based flashing is possible, are there any ST-provided or third-party libraries (.DLLs, wrappers, or tools) that are well-suited for integrating STM32 USB flashing with a C# applicationD

Hello, I am quite new to this. I am generating a PWM signal(100Hz with 40% duty cycle) using Tim1 on my stm32f103c8t6(Bluepill). I want to take ADC readings(both ADC1 and ADC2 in simultaneous mode) during the high part of the PWM signal at a frequency of 1KHz. I want to understand how many timers would be required for this. Currently I am trying to use Tim2 set at 1KHz and trying to trigger it using the TRGO of Tim1. Then I am using TRGO of Tim2 as external trigger conversion source for the ADCs. However as far as I know for Tim1 PWM signal I can only get an interrupt for either when the signal start(Update Event) or when it goes from high to low(Output Compare). How can I get both interrupts so that I can start and stop Tim2.Any help would be appreciated.TIA

I have developed code (on the NUCLEO-L433RC-P) that uses shutdown and wake.The code works when I debug or run, but it stops working after a cold restart (power removed then reconnected).After a cold restart, the software runs correctly until the first shutdown is called.  Once shutdown is called, it seems to crash and I have to perform a reset.From power up, the MCU should run as follows...Run for 10 secondsShutdown for 5 secondsRun for 10 secondsShutdown for 5 secondsAnd so on.....This cycle should continue until 60 seconds is reached, when it should shutdown and stay shutdown.It should not wake again until the WKUP pin is pressedWhy does it seem to crash after the first shutdown (step 2 above) ?I am aware that RTC backup registers are lost when power is removed, but I cannot see this causing the problem.I have attached a flowchart diagram (wake_shutdown.png) to show how my code works.The relevant code is also belowmainMX_RTC_InitwakeConfigResetwakeConfigUpdatemcuSleepm

Hi allI am facing some issue related to measurement of VREFINT and VBAT which is IN17 and IN18 respectively,My ADC1 configuration is 12 bit resolution, 3cycles sample, one shot and software conversion.I ran few tests as follows1.vref which is 2.95 (VDD) and vin is selected as channel IN17 and I am getting 414 in my DR register.  (vrefint bit is clear in CCR)2.vref which is 1.21 (VrefINT) and vin is selected as channel IN17 and I am getting 1702 in my DR register.   (vrefint bit is Set in CCR)3.vref which is 2.95 (VDD) and vin is selected as channel IN18(VBAT) and I am getting 420 in my DR register.  (vrefint bit is clear in CCR).4.vref which is 1.21 (VrefINT) and vin is selected as channel IN18 and I am getting 1679 in my DR register.   (vrefint bit is Set in CCR).help me where I am wrong.B.R

Hello all,I'm evaluating the STM32H743VIT6 on a third-party development board. I tested it with the system clock configured at 480 MHz (double checked everything, and all looks absolutely fine in terms of configuration). I did enable the "overdrive" setting as is done in the LL example (PWR_VOS0_480MHZ).Thing is, it gets very hot while running at 480 MHz (haven't measure exact temperature, but one can't leave a finger on it for more than a couple seconds, so I'd say close to 70°C).Maybe that's fully normal and this chip in this package (LQFP-100) can't be run at 480 MHz. I'm not sure. I configured the clock for 400 MHz instead (and no overdrive), and the temperature drops a lot. It's a bit warm, but that's it. So fully normal.Any tips to run it at 480 MHz, or is it a lost cause? Going for a larger package (LQFP-208?) for my application is not an option. Would a small heatsink be an option? Or is running this at 480 MHz just not recommended at all? Is the overdrive mode needed