STM32 MCUs Products

I try to start working sdMMC with DMA. When D-Cache is not active work well. But when turn it on stop work. Probably need to create MPU region , but where is located used RAM from sdMMC. And if need, how to change .ld file? 

  Currently designing a PCB that has a USB-C 16 pin connector. For maximum flexibility the PCB can take either a H723 or a F723 MCU. (The H723 has USB FS pins only, whereas the F723 also has USB HS pins available). This design allows it to operate in either USB in FS or HS modes but with only a single USB C port. 1 - What is best practice for wiring up the STM32 USB ID pin (FS or HS) in a USB-C scenario? Do I leave it floating, grounded, or does it need to be connected to one or both of CC1\2 ? 2 - Regarding USB connectivity, can I connect in parallel the following MCU pins (since both sets are inputs to the STM MCU)   pin 69 (FS_ID) to pin 51 (HS_ID)?   pin 68 (FS_VBUS) to pin 52 (HS_VBUS)? 3 - For question 2, when using a H723 MCU, pins 51 & 52 would be configured as GPIO inputs. When using a F723 either USB mode could be used, so its possible pins 68 & 69 would be configured as GPIO inputs instead. Would this parallel connectivity idea adversely affect FS_ID a

As I said before, several issues mentioned in post https://community.st.com/t5/stm32-mcus-products/missing-section-irtim-in-stm32u0-rm-and-more/td-p/667127, were not fixed.And I have more.STM32F0:1. RM0091 page 184 and table 27: Missing SYSCFG_ITLINE31 register with USB bit.2. RM0091 page 629: There is a register RTC_OR with RTC_ALARM_TYPE and TSINSEL[1:0] bits. But it is missing register description before section "25.7.17 RTC backup registers (RTC_BKPxR)". On STM32L0 RM this register is named "RTC option register".3. RM0091 page 613: "This register is write protected (except for RTC_ISR[13:8] bits)." Bits [13:8] should be [15:8]. STM32G0:1. RM0444 page 165: Register RCC_AHBSMENR should be RCC_BDCR.2. RM0444 page 75: Mentions HPREF bit, but it doesn't exist. STM32U0:1. RM0503 page 162: Register RCC_AHBSMENR should be RCC_BDCR.2. RM0503: Missing IRTIM IR_POL bit in SYSCFG_CFGR1 register.3. RM0503 page 61: TIM1/15 should be TIM1/15/16.4. RM0503 page 64, typo: '32 bytes x

HiWhen searching and filtering in the PRODUCT SELECTOR I find that accoring no one of the STM32H7R3 MCUs have UART, USART, SPIetc. It also shows that STM32H7R3V8T6 has internal SMPS, but in the datasheet it does not krØystein

STM32H753 @ 480MHz32bit SDRAM @ 125MHzLTDC clock @ 40.8MHz, 800x480 display, RGB565I increment a counter in the LTDC error interrupt when there is a FIFO underrun.That value will be 0 for >2 weeks. Then, one day, it will thousands of times every second. And of course, the display is erratic, glitchy, completely messed up.This is pretty reproducible as well. When I reboot the hardware, it will run for 18 days or something without issue, and then it happens again.I am at my wits end with this one... anyone have any clue whatsoever as to what could be happening here?

New question moved from this post. @mƎALLEm Hey! Thanks for the quick response. I saw your post from a previous thread with a same question but for the STM32F407VG.https://community.st.com/t5/stm32-mcus-products/stm32f407vg-adc-injected-channel-with-dma/td-p/652531 Is the DMA Peripheral in STM32F407VG same as GPDMA Peripheral in STM32U5? The STM32U5 Series has a GPDMA Peripheral which looks to be different from the F4 DMA.Thanks!

Hi everyone,I'm currently investigating an interesting issue with an STM32F030 and would appreciate some insights.I've noticed that when the processor gets warm, it takes noticeably longer to start up properly and begin executing the main software (takes longer in my bootloader state - displayed via LED). Once it's running, it seems fine, but the boot delay is definitely temperature-dependent.Has anyone experienced this before? I have two main questions regarding this behavior:General Execution Speed: Can the processing speed actually be affected by the heat? Meaning, does the MCU generally execute code slower when warm, or is the clock strictly fixed once running?Startup / Stabilization Phase: Is it more likely that the MCU is just waiting longer during the initial boot phase? For example, could the startup delay be caused by the internal oscillator (HSI) or external crystal (HSE) taking longer to stabilize, or the voltage/POR circuits reacting differently to the temperature?I suspect

Heyho,I'm not a SW / DSP guy, but I have to help selecting a new MCU.Mostly we need gigabit ethernet, SAIs / I2S for audio input.But for some future applications we might need some DSP power for online audio processing, some heavy filtering and FFT stuff.I wonder if the N6 's NPU can help with that. In all the documentation / ads I mostly see graphics applications.

I am using STM32U575ZIT6QU Microcontroller to measure voltages on 4 analog channels. The 4 channels are configured as Injected Channels. In the RM0456 reference manual, for STM32U5 series, I am unable to find information about using GPDMA with ADC Injected conversions. Is it possible to use ADC Injected Conversion with DMA?

Oh boy, I'm frustrated...Just when I thought I found the right MCU with the N6 (multi-channel audio over gigabit ethernet), I find in CubeMX and the datasheet that SAI2_SD_A and ETH1_CLK use the same pin. And I need both SAIs completely.Very frustrating.Using some I2S might be a solution, but these cannot be synced internally, aside from some other helpful features the SAIs have.So, any other ideas, or will there be other packages where this pin-sharing problem might be solved? 

Dear ST team,I need some tips!!!I am using STM32H745 for my project. In the project, the M7 core is dedicated to control and measure the power circuit values and M4 core is responsible for communications (few UARTs) and LCD. I configured the MCU with STM32CubeMX and use Keil uvision fore code composing. After generating code, I noticed that there are two separated codes were generated for each CPU.How can I bridge between two CPUs to share data? I want to send measured data by M7 via UARTs controlled by M4?I will appreciate if you give me some applicable suggestions.

I have build a Fully pin compatible STM32H750B-DK board with USB Device only setup along with Touchgfx and Freertos , Touchgfx is displaying everything correctly but the USB Isn't responding , I have setup the USB OTG FS in Device Mode as shown in the attached Images.PC is not detecting anything

Hi,The input to the MCU is basically 1-bit (0/1 values), but it would be better if it could process multiple bits.The input is at 150MHz, and 10,000 data items are received at once. The MCU must store them in uint8_t data[10000]. When a 1-bit value is received, data[10000] contains 0/1 values. For the next data item, the 0/1 values ​​must be accumulated and added for calculation.This is what I’ve come up with:1) GPIO: 150MHz input is not possible.2) ICP + DMA: It seems possible, but it doesn't seem to work. ICP cannot  reliably capture 150MHz, and DMA doesn't seem to be able to store data in SRAM.3) DCMI or DCMIPP: 8-16bit data can be processed, and accumulation is possible using DMA. However, the maximum speed is 80MHz or 120MHz.Is there a model among the stm32 models that can do this on its own mcu?

Hi,I want clarification on STM32 option byte programming.When we write new values to FLASH_OPTR and other option registers:Where are these FLASH option registers physically located?Are they inside the FLASH peripheral (0x4002xxxx region) and not in the option byte Flash area (0x1FFF8000)?When OPTSTRT is set, does the CPU erase/program the option byte pages, or does the FLASH controller hardware automatically erase the option byte Flash area and program it using the values in the FLASH option registers?I want to clearly understand the internal flow between:Option byte Flash memoryFLASH option registersFLASH controller hardwareThank you.

Heyho,when enabling the INSTRUCTION cache in STM32H7(33), what must be taken care of?Any cache handling required? Any MPU settings required?As far as I understood that's only required for DATA cache?

I'm connecting a 12-Way rotary switch to an STM32G071 as shown:Board room is extremely limited, so I'm using the MCUs built in Pull Ups. However when I read the lowest four bits of PORTD->IDR (for switch positions 7,8,9 and 10) it reads 0xA when it should read 0xF (The rotary is at position 1, so PORTD0:3 should all be pulled up).Cube MX confirms PULL UP is enabled for all switch inputs:The only other peripherals enabled on the chip are DAC output on PA4 and GPIO Output on PA15I have carefully examined the board, and there are definitely no shorts to ground, and the switch it operating perfectly.If I measure the voltage on all the PORTD0:3 pins, all are pulled up to 3.3v except PD0 and PD2, when they should be.Any suggestions? 

Hello All, Could you kindly provide RoHS, REACH and material declaration certifications for the following ST components: 1. STM32G474MBT62.VL53L1X-SATEL I checked for obtaining these documents through ST Micro e-store but unfortunately 404 error was obtained (Page not found). Kindly help and provide the documents for the same. Requesting for your immediate support. 

Hello ST Community,I read in the follow post question about boot sequences for STM32:STM32H7 dual core: How to start with a busy-waitin... - STMicroelectronics CommunitySo, in the post above, I see that is explain the first three Boot order of the Table 8 of the RM0399 (I put this table below), but not the last modality: Both Cortex®-M7 and Cortex®-M4 are booting.My question is: is possible to have a explanation similar to the one in the post above, but refer to Both Cortex®-M7 and Cortex®-M4 are booting?Thanks in advance,Dino

I am using ADC + DMA + USART1 + Timer in STM32 IDE in a setup consisting of:Motor → Sensors → MCU (STM32N6) → PCI am capturing the signal received at the serial port using NanoEdge AI. I have shared screenshots of:The actual current waveform observed on the oscilloscopeThe data received through the STM32N6 MCUMy doubt is:Is there anything inside the MCU or ADC that could suppress or distort the natural sinusoidal shape of the current waveform?Note:I have converted ADC values to actual current values using a 3.3V reference.I have removed the sensor bias.I have properly accounted for sensor gain.I would like to confirm whether the MCU/ADC processing could be affecting the waveform shapeEdited to place the images in the post: 

OTP portion of FLASH is a valuable asset in some STM32 families and represents a convenient place to store things like security keys. For this, it is desirable - and, as it's part of FLASH, also quite logically expected - that setting read-out protection to any level above 1 prevents the debugger from reading it.In RM0444 Rev.5 and RM0454 Rev.5 (the current 'G0 manuals), the following text indicates that this should be the case:The following table appears to indicate the same behaviour:However, user @DAlbe.3 reported, that he was able to read out OTP using debugger, while RDP was set to Level1.This, together with the fact, that the above table has changed across RM revisions, rises questions about the OTP's security.Can ST please comment? Thanks,JW

I am using STM32H563 and using seven pins to read data, all through ADC1 with GPDMA1 Channel0 -2 Words internal FIFO. I connected all seven pins to ground, expecting to get all zeros or values close to zero, but the readings seem to fluctuate randomly.Although the ADC values do increase when connected to Vcc (>3000) and decrease when connected to ground (<2000), how can I ensure that the readings are correct? Are there any settings that I should adjust?uint16_t adcbuf[7] = {0}; HAL_ADCEx_Calibration_Start(&hadc1, ADC_SINGLE_ENDED); HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adcbuf, 7); while(1) { printf("ADCBUF: "); for (int i = 0; i < 7; i++) { printf("%d, ", adcbuf[i]); } printf("\r\n"); HAL_Delay(1000); } Below is the ADC1 configuration from my .ioc file. (All ranks are configured identically, except for the channel.) Below is the GPDMA1 configuration. (Use Standard Request Mode)  

Heyho,the title says it...In RM0486, 14.6.5 PLL description, page 437 / 438 I find this:Using the PLLs in fractional modePLL off ... set FRAC ... PLL onCaution: Do not update DIVN and DIVNFRAC after the PLL has been enabled.On the other hand, there are comments that some dividers can be changed on the fly.So maybe it might work? Has anybody tried? With these 4 PLLs and the great clock routing possibilities, the ability to change FRAC values on the fly with this high resolution would be a fantastic feature for synchronization, without using an external VCO. 

Hello, I made a board with an STM32F103C8T6 which uses USB.My issue is that when conecting USB (self powered or with external power) I get the following error on windows:Windows has stopped this device because it has reported problems. (Code 43) A request for the USB device descriptor failed.Things I checked:- When no USB is connected, the D+ line is pulled to 3v3, but when connecting the USB it goes down to 2.8 with 0.5v being on the resistor.- Checked continuity from USB header to A11 and A12 pins (when unpowered)- Resolder pins to ensure propper contact (Except FL1, I checked that everything else is proppery soldered, but I guess continuity is a good proxy test)- Changed MCU, USB header and FL1 for new ones in case they got damaged- Firmware was tested with a bluepill and everything worked.It's been a week with this issue, if someone know what could be happening or could give me tips to help diagnose this I'd appreciate it.Here are the schematics for that part of the board: &n

Hi everyone,  I'm looking for a way to be able to encrypt my flash on stm32g030. How do I do it? Thanks

Hi，Can the equivalent gate count for the STM32H750VB be provided for reliability research?Thanks