Posted on November 21, 2017 at 12:55The original post was too long to process during our migration. Please click on the attachment to read the original post.
/* Several peripheral DMA handle pointers point to the same DMA handle.
Be aware that there is only one stream to perform all the requested DMAs. */ // __HAL_LINKDMA(hsai,hdmarx,hdma_sai1_b); __HAL_LINKDMA(hsai,hdmatx,hdma_sai1_b); /* DMA2_Stream4_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn); } }
From my understanding, using your configuration you can loop back SAI using DSP mode (bit pulse mode for frame signal) but you are facing data integrity issue using the standard I2S format where frame signal polarity is aligned with I2S channels.
Your app is : Mic --> AudioCODEC --> STM32 I2S RX
--> STM32 I2S TX --> AudioCodec --> headset.
Did you try to split the path and testing separetly RX path and TX path for example using a stored sinus wave for TX ?
Regards,
Simon
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It does not work in SAI A and B (ful-duplex in i2s mode). In DSP mode it is ok. Codec initialization is correct. I do not have time to search for the solution so i changed interface to I2s between codec and a MCU and it works ok now.
Also i use another i2s to send/receive data to GSM modem LE910.
I2s in my app is in slave mode so i had to take into account errata which says:
'In slave mode, the WS signal level is used only to start the communication. If the I2S (in slave mode) is enabled while the master is already sending the clock and the WS signal level is low (for I2S protocol) or is high (for the LSB or MSB-justified mode), the slave starts communicating data immediately. In this case, the master and slave will be desynchronized throughout the whole communication.'
And that is true, in my app signals where unsinchronized (90% of cases). When i enable i2s when WS signal is high it is perfect.
Thank You for your help. I leave SAI in I2s mode problem.