Application Configuration - Clock settings

[ssk]

Posted on April 25, 2015 at 13:58

I am using test application for serial interface with SPC560D30. I used the application configuration - clock settings as 16MHz with the SPC discovery kit. Now keeping the test application same, I want to change the clock settings to 8MHz which the actual value I am using on my target hardware. When I do these changes using Application configuration and generate it, following errors are displayed (please find attached image also),

In file included from ./components/portable_spc5_hal_component/lib/include/hal.h:32:0,

 

                 from ./components/portable_spc5_hal_component/lib/src/hal_queues.c:38:

 

./components/spc560dxx_hal_drivers_component/lib/include/hal_lld.h:683:2: error: #error ''SPC5_FMPLL0_VCO_CLK outside acceptable range (SPC5_FMPLLVCO_MIN...SPC5_FMPLLVCO_MAX)''

 

 

In file included from ./components/portable_spc5_hal_component/lib/include/hal.h:32:0,

 

                 from ./components/portable_spc5_hal_component/lib/src/can.c:25:

 

./components/spc560dxx_hal_drivers_component/lib/include/hal_lld.h:683:2: error: #error ''SPC5_FMPLL0_VCO_CLK outside acceptable range (SPC5_FMPLLVCO_MIN...SPC5_FMPLLVCO_MAX)''

 

 

In file included from ./components/portable_spc5_hal_component/lib/include/hal.h:32:0,

 

                 from ./components/portable_spc5_hal_component/lib/src/hal.c:25:

 

./components/spc560dxx_hal_drivers_component/lib/include/hal_lld.h:683:2: error: #error ''SPC5_FMPLL0_VCO_CLK outside acceptable range (SPC5_FMPLLVCO_MIN...SPC5_FMPLLVCO_MAX)''

 

 

In file included from ./components/portable_spc5_hal_component/lib/include/hal.h:32:0,

 

                 from ./components/portable_spc5_hal_component/lib/src/adc.c:25:

 

./components/spc560dxx_hal_drivers_component/lib/include/hal_lld.h:683:2: error: #error ''SPC5_FMPLL0_VCO_CLK outside acceptable range (SPC5_FMPLLVCO_MIN...SPC5_FMPLLVCO_MAX)''

 

Does that mean clock settings below 16MHz are not allowed? Whether SPC560D30 can not support/use 8MHz xtal?

Your earliest response will be highly appreciated as this will affect xtal and other parts procurement and may affect the delivery schedule. Thanks in advance for your help.

Mike.

[Erwan YVIN]

Posted on April 27, 2015 at 10:40

hello Mike ,

There are some limitations explained in the RM cf chapter 6.6.3 The FMPLL has the following major features: �? Input clock frequency 4 MHz – 16 MHz OK �? Voltage controlled oscillator (VCO) range from 256 MHz to 512 MHz You need to update in your PLL Settings (IDF and NDIV) in order to be between 256Mhz and 512Mhz

/**
* @brief SPC5_FMPLL0_VCO_CLK clock point.
*/
#define SPC5_FMPLL0_VCO_CLK \
((SPC5_XOSC_CLK / SPC5_FMPLL0_IDF_VALUE) * SPC5_FMPLL0_NDIV_VALUE)

Best regards Erwan

[ssk]

Posted on April 27, 2015 at 11:18

Does this mean I need to modify the values to the header file generated by application? Can you please elaborate in detail what to do?

When I use Board Identifier as 'GENERIC_SPC560DXX' and Board name as 'Generic SPC560Dxx', I am able to use the xtal value of 8MHz but can not change to 16MHz. This is totally opposite behaviour when I select the SPC Discovery kit as board identifier. Why is this so? What is reuqired to be done here?

Thanks.

Mike.

[Erwan YVIN]

Posted on April 28, 2015 at 10:02

Hello Mike ,

You have to change correctly the PLL Settings in configuration.xml.(Cf screenshot)

Calculation Voltage controlled oscillator (VCO) range from 256 MHz to 512 MHz

Best regards

Erwan

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Attachments :

2015-04-28_095517.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtZq&d=%2Fa%2F0X0000000aRx%2F2h9Kf1bcPEZwpRXg5MJk4TKSG.0CkXsJCJekyyk4Eds&asPdf=false