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raghu tumati
Associate III
September 20, 2017
Question

PIT Timer Interrupt < 2.5us

  • September 20, 2017
  • 2 replies
  • 1523 views
Posted on September 20, 2017 at 19:44

Hi 

I trying to use the PIT to generate an interrupt every 1.7uS to toggle a GPIO and it does not seem to be working well. 

I have a sysclk of 64MHz. Im using PIT1 and setting the LDVAL register with a count. Now the timer seems to be working well for a count of 200000 which corresponds to an intrerupt time of 5uS. 

But any value less than that and the timer is unstable (high value of jitter) 

Going further a value of 1000000 which corresponds to an interrupt time of 1us just does not work. The PIT does not seem to be able to generate an interrupt less than 2.5us. 

I tried chaining the priority of the PIT interrupt to 15 in the file pit_lld.h 

Below is my setting 

#define SPC5_PIT_CH1_IRQ_PRIORITY       INTC_PSR_ENABLE(INTC_PSR_CORE0_15) 

This also did not seem to work. Is there any other setting that I can change to get this to work?

    This topic has been closed for replies.

    2 replies

    Tesla DeLorean
    Guru
    September 20, 2017
    Posted on September 20, 2017 at 23:33

    Is it unable to generate interrupts at that rate, or is the processor not able to stack context, and enter/exit an interrupt at such rates.

    Figure out where the processors saturation point is. Consider if there are more effective ways for hardware to generate a toggling output signal.

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    raghu tumati
    Associate III
    September 21, 2017
    Posted on September 21, 2017 at 00:39

    I believe it can generate interrupts at that rate but it is the entering/exiting ISR thats the saturation point. But thats just a guess. The clock is at 64Mz. So thats around 132 cycles for a 2us timer. It should be able to do it. 

    Just curios if anyone else in this community has ever had to implement such an exercise? 

    Tesla DeLorean
    Guru
    September 21, 2017
    Posted on September 21, 2017 at 00:58

    Relatively low trafficked forum. When you're up at 500 KHz the exercise is to make the timer to be autonomous, and to recognize that's how to eliminate jitter.

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    Erwan YVIN
    ST Employee
    September 26, 2017
    Posted on September 26, 2017 at 10:43

    Hello Raghu ,

    Could you confirm the device used ?

    it is well SPC56P60  ..

    Did you try to update SPC560Pxx_RLA PIT Test Application for Discovery ?

       Best Regards

                                Erwan