[solved] Interrupt priorities

[Patriks]

Posted on November 25, 2014 at 13:18

Hello,

Yesterday, I investigated a problem with my software project for an SPC560B. There are several calculations running on the controller and it additionally communicates over UART with a PC. When I tried to increase the UART baud rate, I got the effect that the controllers ''miss'' some bytes sent by the PC.

I found out, that reason for that effekt has something to do with the UART RX interrupt and an interrupt created by the periodical timer PIT. After the PIT causes an interrupt, the UART RX can not trigger an interrupt. I always thought that a higher priority interrupt can break the program even when another lower prior interrupt is currently running?

Best regards,

Patrik

[Erwan YVIN]

Posted on November 27, 2014 at 09:30

Hello Patrik ,

We are investigating the issue

            Best Regards

                      Erwan

[Patriks]

Posted on December 12, 2014 at 07:31

Dear Erwan,

Can you already give me a hint how I can avoid the described behaviour? I thought about locking other interrupts during the UART receive process. Is there a way to lock parts of the source code (e.g. an interrupt handler) that it can not be interrupted from another interrupt source?

Best regards,

Patrik

[Erwan YVIN]

Posted on January 21, 2015 at 17:53

Hello Patrik ,

Sorry for the late answer.

osalSysLockFromISR is used to enter to a critical zone.

OSAL_USE_IRQ_PREEMPTION is not defined (cf osal.h)

you can try to define OSAL_USE_IRQ_PREEMPTION in your project (Platform component)

but we have not tested this case.

Which speed do you try to validate ?

   best regards

                Erwan

[Patriks]

Posted on January 23, 2015 at 12:50

Hello Erwan,

I have added a picture which shows the loss of UART data (hope it worked). The PIT interrupt raises every 100ms and can´t be interrupted from the UART RX interrupt. UART baud rate was configured as 460800.

Best regards,

Patrik

________________

Attachments :

pic.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HyLa&d=%2Fa%2F0X0000000bZq%2FEx56LI44R7FHrFI4CPZ_DHJPwcDyMZa4VSdrVMigVak&asPdf=false

[Erwan YVIN]

Posted on January 30, 2015 at 11:01

Hello Patrik ,

in the default OSAL Configuration,

PIT_0 happenned every 1 ms. (set to 1000) in OSAL

did you try ''Preemptable ISRs'' ?

  Best Regards

             Erwan

[Patriks]

Posted on February 02, 2015 at 07:52

Hello Erwan,

do you mean to set

OSAL_ENABLE_IRQ_PREEMPTION

in osal.h to TRUE? I never tried to change any of theses default settings.

/*===========================================================================*/ 
/* Module pre-compile time settings. */ 
/*===========================================================================*/ 
/** 
* @brief Enables the interrupts during the ISRs execution. 
*/ 
#if !defined(OSAL_ENABLE_IRQ_PREEMPTION) || defined(__DOXYGEN__) 
#define OSAL_ENABLE_IRQ_PREEMPTION FALSE 
#endif 

For what is PIT_0 used in default configuration? Best regards, Patrik

[Erwan YVIN]

Posted on February 02, 2015 at 17:58

Hello Patrick ,

OSAL_ENABLE_IRQ_PREEMPTION

is configurable on OSAL Component. (Configuration level) FALSE by default

#if OSAL_ENABLE_IRQ_PREEMPTION
/* Allows preemption while executing the software handler.*/
wrteei 1
#endif
/* Executes the software handler.*/
bctrl
#if OSAL_ENABLE_IRQ_PREEMPTION
/* Prevents preemption again.*/
wrteei 0
#endif

PIT_0 is used for 1ms tick (os-less) If you think that the Tick is too heavy, you can try to enable this feature. Best Regards Erwan

[Nickname16641_O]

Posted on February 03, 2015 at 14:53

Hi Patrik,

At which baud rate you start to experience the issue?

Giovanni

[Patriks]

Posted on February 03, 2015 at 15:59

Hello Giovanni,

I tried three baud rates. It worked with 57,6kb/s, but not with 460,8kb/s and 128kb/s.

Best regards,

Patrik

[Patriks]

Posted on April 22, 2015 at 16:19

Hello!

Once again, I have problems with interrupt priorities (the issue I started with this topic has never been solved).For my current project, Ihave a very high priority ISR which must preempt all other ISRs. I tried different priorities and settings within the source code, butI wasn´t able to get this behavior.

Therefore, I set up a small demo project for SPC56xL Discovery Board (based on SPC56EL OS-Less Demo Application from SPC5 Studio)

Within this application, I integrated two PIT timer interrupts (channel1 and channel2). One interrupt handler gets a high priority (8) and the other one a low priority (2). I expected, that the high priority preempts the lower priority. But the higher priority interrupt is only executed when the lower priority isn´t running.

For better understanding, I attached a picture. In this picture, signal D6 represents the lower prior interrupt, D4 the higher prior interrupt. The two pins are set at the beginning of the corresponding ISR and cleared at the end of ISR.

To be sure that it isn´t a problem with my interrupt handlers, I also created the ISRs using the SPC5 Application Configuration with activated ''Preemptable ISRs'' option. Nevertheless, I got the same result as with my ''own'' interrupt handlers.

These are the interrupt handlers in osal_cfg.c:

/*===========================================================================*/ 
/* Module ISRs. */ 
/*===========================================================================*/ 
/* 
* ISR_1 ISR function (vector 61). 
*/ 
OSAL_IRQ_HANDLER(vector61) { 
OSAL_IRQ_PROLOGUE(); 
/* ISR code here.*/ 
Task_10us(); 
/* Resets the PIT channel 0 IRQ flag.*/ 
PIT.CHANNEL[2].TFLG.R = 1; 
OSAL_IRQ_EPILOGUE(); 
} 
/* 
* ISR_2 ISR function (vector 60). 
*/ 
OSAL_IRQ_HANDLER(vector60) { 
OSAL_IRQ_PROLOGUE(); 
/* ISR code here.*/ 
Task_100us(); 
/* Resets the PIT channel 0 IRQ flag.*/ 
PIT.CHANNEL[1].TFLG.R = 1; 
OSAL_IRQ_EPILOGUE(); 
} 
/*===========================================================================*/ 
/* Module exported functions. */ 
/*===========================================================================*/ 
/** 
* @brief Generated initialization code. 
* 
* @special 
*/ 
void osal_cfg_init(void) { 
INTC_PSR(OSAL_VECTOR_ISR_1)=INTC_PSR_ENABLE(INTC_PSR_CORE0, 8); 
INTC_PSR(OSAL_VECTOR_ISR_2)=INTC_PSR_ENABLE(INTC_PSR_CORE0, 2); 
} 
/** @} */

Additionally, OSAL_ENABLE_IRQ_PREEMPTION in osal_cfg.h is set TRUE

#if !defined(OSAL_ENABLE_IRQ_PREEMPTION) 
#define OSAL_ENABLE_IRQ_PREEMPTION TRUE 
#endif

What is the reason for the described behavior? And how I have to configure my system toactivate preemption of lower priorities by higher priority ISRs?

Best regards,

Patrik

________________

Attachments :

scope_72.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I0Vk&d=%2Fa%2F0X0000000bZo%2FrJoqsMF2nqhS.6_N.508vRWfiqkn9aZhUOcTRN0gUM4&asPdf=false