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Associate II
August 26, 2025
Solved

Unexpected results with LL_ATON LL_ARITHACC AFFINE operation (AX + BY + C)

  • August 26, 2025
  • 2 replies
  • 601 views

Hello, 

I am working with the LL_ATON library on STM32N6 and testing the LL_ARITHACC unit using the AFFINE operation, defined as: Output=AX+BY+C.

I ran several tests with a simple network model whose only purpose is X + Y.

My expectation is:

  • Case 1: A = 0, B = 0, C = 1
    → Output is correctly constant 1 as expected.

  • Case 2: A = 1, B = 0, C = 0
    → Expected output = X, but the results are completely wrong and look like random values.

  • Case 3: A = 0, B = 1, C = 0
    → Expected output = Y, but again the results are incorrect and look random

So, while the C_scalar works correctly, the usage of A_scalar and B_scalar does not produce the expected behavior.

Questions:

  • Is there any special configuration needed in the switch/stream setup for X and Y inputs when using AFFINE?

The following screenshots are taken from the network.c file generated by the STEdgeAI compiler after compiling my simple X + Y tflite model. They show the configuration of the LL_ARITHACC unit for the AFFINE operation.Snipaste_2025-08-26_11-20-53.pngSnipaste_2025-08-26_11-21-32.pngSnipaste_2025-08-26_11-22-05.png

Thanks. 

Best answer by yangweidage

Problem solved. Before starting the first epoch that passes the inputs to the NPU through DMA, I forgot to clear the D-Cache.

2 replies

Associate II
August 26, 2025

yangweidage_0-1756179560150.png

Additional information:
The screenshot (see red box in main.c) shows how I initialized the input buffer to zero before running inference. This guarantees that both X and Y are all zeros during the test. However, the problem persists: With A=1, B=0, C=0 or A=0, B=1, C=0, the outputs are still incorrect and look random.

yangweidageAuthorBest answer
Associate II
September 3, 2025

Problem solved. Before starting the first epoch that passes the inputs to the NPU through DMA, I forgot to clear the D-Cache.