1. When using the SD interface of stid135 demodulation chip, we found that MCLK output driver is insufficient. We connect the data line of the SD and MCLK directly to the IO of the FPGA, and the FPGA grabs it online, so we can't get it? Can you solve
1. When using the SD interface of stid135 demodulation chip, we found that MCLK output driver is insufficient. We connect the data line of the SD and MCLK directly to the IO of the FPGA, and the FPGA grabs it online, so we can't get it? Can you solve this problem. We looked at the official assessment board, which is also directly connected.
2. Is the chip capable of receiving and processing Hughes' system?
