BlueNRG-x documentation discrepancy/lack of information.
Hi everyone!
I have a custom PCB with a STM32L4 connected via SPI to a SPBTLE-1S. As indicated in the datasheet the SPBTLE-1S is built around the BlueNRG-1 SoC.
Until now I understood that I have to configure the SPBTLE-1S as a network co-processor in order to allow it's usage on a custom PCB.
In the DT0121 Design tip (How to configure the BlueNRG-1 and BlueNRG-2 devices in network coprocessor mode) document is written:
"The purpose of this design tip is to provide customers with guidelines on how to modify the reference DTM application for running on a custom printed circuit board (PCB).",
an than,
"In order to configure the BlueNRG-2 device as a network coprocessor, the device shall be programmed with a specific application, named DTM (Direct Test Mode). In the device SDK the source code for this application can be found in the path “\Project\BLE_Examples\DTM�?."
In the description of the SPI interface the following table can be found:
In the SPBTLE-1S datasheet the pins seem to be configured differently as shown in the following screenshot:On this basis the SPI connections between The STM32L4 (master) and the SPBTLE-1S(slave) are the following:
CLK -> DIO0
MISO -> DIO3
MOSI -> DIO2
CS -> DIO1
The current situation is this: I flashed the DTM_SPI.hex for BlueNRG-1 SoC on the SPBTLE-1S module and I tried to generate some code with cubeM and X-CUBE-BLE-1 pack to try some basic communication via SPI between the MCU an the BLE module. All What I get is a always high signal or always low signal on the MISO. Everything was checked with a logic analyzer.
My questions are:
- Is there any mistake in the connections between the STM32L4 and the SPBTLE-1S on the PCB?
- The binary file of the DTM firmware, DTM_SPI.hex, for the BlueNRG-1 SoC considers the different configuration of the pins in comparison with the configuration showed for the BlueNRG-2 Soc in the Design tip?
- Do I have to modify the DTM firmware to make it work?
Thanks in advance for your help!
