How does UART work without the HAL layer ?

[DTr.1]

Title shortened in accordance with community guidelines.
Original title: "How does UART work without the HAL layer? Does the shift register clear itself once it has transmitted its data? And what's the timing I need to have?"

---

Some context, I'm using a RS485 data line in half-duplex mode to communicate between an STM32F107 (the master card here) and an STM32F072 (the slave card). My end goal is to be able to use the bootloader on the slave card and reprogram it from the master crad (the binary file I'll use is stored on an SD card, I already have a library ready to use but I want to make sure I can make the two boards talk properly).

 

So, here's what I gather is the problem : I'm touching the registers for communication directly, to avoid HAL (that's just how the project I'm working on is, I never used HAL and neither has anyone in the team). The F107 uses only a DR register for reading and writing, so when I send a data on the DR register this byte is transferred to a shift register before being sent on the bus line. But I'm having trouble with the correct... protocol, for lack of a better word. What are the major steps I should follow, if I'm missing any ? Does the shift register clear itself once the data is sent, or do I have to clear it manually (I can see on a terminal that I'm sending several times a data packet when I only want to send it once) ? And is there an indication of how much time I need to wait to make sure my data has been sent before I toggle the master and slave R/T signals ?

 

I'm so close to making this work, but at the same time... I've been at this stage for the last week or so ^^"

[Tesla DeLorean]

The electronics/logic work exactly the same.

The DR is not a "memory", but a window onto internal mechanics of the peripheral.

The system can understand if you're reading, or writing.

Don't RMW the the DR, or speculatively read it.

Every time you read it, it will clear the RXNE, and when you write it, it will clear TXE

The TXE will assert as the first bit hits the wire, and the holding buffer can take new data.

You should use TC to see if the last bit has crossed the wire.

You would probably want some time margin before flipping Receive / Transmit, and clear RXNE.

You could use a GPIO and scope to check to confirm bits on the wire, vs TC flagging.

[DTr.1]

And of course, my luck has made me find what I was doing wrong just as I ask a question. But it does confirm what you are saying, so that's a good thing.

The one thing I would like to have more info on is how much time I need to let elapse before flipping the R/T. What would be a good guesstimate ?

[Piranha]

TC flag is set after the stop bits and therefore there should be enough time for the receiver on the other end to receive the frame.

// Do transmission
while (!(BSP_UART->ISR & USART_ISR_TC));
REG_MOD_BITS(BSP_UART->CR1, USART_CR1_TE | USART_CR1_RE, USART_CR1_RE, 0);
while ((BSP_UART->ISR & (USART_ISR_REACK | USART_ISR_TEACK)) != USART_ISR_REACK);
// Do reception

In some project I'm doing this and it has no problems.