Need register and bits locations of PDO_I and PDO_V bit fields to change available PD power

[alfred3a09]

I want to programatically modify the PDO profiles on the fly depending on the available power. The document stusb4710.pdf implies that this is possible:

"The STUSB4710 has a set of user-defined parameters that can be customized by NVM re-programming and/or by software through I 2 C interface."

"When a default value is changed during system boot by software, the new settings apply as long as the STUSB4710 is being run and until it is changed again"

The pertinent bit fields are documented in "TNxxx - STUSB4700 NVM Description.pdf", e.g. LUT_SRC_PDO1_I, LUT_SRC_PDO2_V, etc.

The definitions of these bit fields are documented in stusb4710.pdf. However, the locations of these bit fields are only hinted in "Table 9. STUSB4710 register map overview" of stusb4710.pdf and in "3. STUSB_BLOCK register list" in another document "stusb47_registers - public.pdf". There is no accurate documentations on the bit and register locations of these registers for me to modify them to change the power delivery profiles. Further more, there is no discussions about the preservation of the other bits in the registers, whether they should be read/modified/written.

I have reviewed these posts but they do not provide sufficient information:

https://community.st.com/t5/interface-and-connectivity-ics/stusb4700-4710-i2c-register-details/td-p/234334
https://community.st.com/t5/interface-and-connectivity-ics/stusb4700-power-delivery-configuration-questions/td-p/64343

I would appreciate if you can provide the necessary information. Thank you in advance.

[alfred3a09]

I was able to obtain meaningful decoding according to the "Table 6-6 Fixed Supply PDO - Source" on page 154 of the "Universal Serial Bus Power Delivery Specification" Revision 2.0 Version 1.3.

It appears that DPM_SRC_PDO1_0 is the the LSB and DPM_SRC_PDO1_3 is the MSB of the 32-bit PDO.

I will proceed according to this assumption.

[fred3]

@alfred3a09 Did this work out for you?  I have a similar use case: dynamic control of the PDO profiles based on the available power.  Thanks for any updates you can provide.

[alfred3a09]

Yes, it worked out.  I chose to always advertise 5 PDOs and have duplicated values instead of changing the number of PDOs to use; since the minimum is 3 so I'll have to repeat any way.  The changes only take effect after toggling the reset bit, and the client device will disconnect and reconnect, but it did work to negotiate to a voltage that I advertised.

[fred3]

This is wonderful news!  Thanks for the tip about repeating the PDOs: that makes sense and makes your solution very elegant.   I will try to reproduce your success later this month.

To make sure I understand, I think you did the following:

• PDO1:  I2CWrite to register 0x71 for 4 bytes (little endian, LSB first):  32 bit PDO
• PDO2:  I2CWrite to register 0x75 for 4 bytes (little endian, LSB first):  32 bit PDO
• PDO3:  I2CWrite to register 0x79 for 4 bytes (little endian, LSB first):  32 bit PDO
• PDO4:  I2CWrite to register 0x7D for 4 bytes (little endian, LSB first):  32 bit PDO
• PDO5:  I2CWrite to register 0x81 for 4 bytes (little endian, LSB first):  32 bit PDO
• Start reset:  I2CWrite to register 0x23 for 1 byte, value 0x01
• Pause for 100ms
• Stop reset:  I2CWrite to register 0x23 for 1 byte, value 0x00

Is this correct, or did it require even more work to make it all happen?

Did you have success polling the device via I2C for status updates?