STPMC1 - not writing configurations

[JEVelez]

Hello everyone.

I'm currently building a controller for this energy measurement chip.

So far, I've built my controller and can perform a remote reset and read data, but when I want to configure a register, I send my desired configuration, but when I read it, it remains at zero.

I've already reviewed and applied all the suggestions in the application note. I'm using "SPI" (some type) to send the data. The chip is powered at 3.3V, a 4.194MHz crystal, and the signals are configured according to the AN3254 application note.

My configuration sequence is:
- Remote reset.
- Wait for 120ms.
- Send the RD register at 1 to retrieve the temporary shadow registers.
- Send my desired configuration.
- Read all registers.

I don't know why I'm not seeing the configurations reflected in the registers.

Attached are screenshots of RRR signals, readings and writings.

[Didier HERROUIN]

Hello,

Maybe you do not access correctly the temporary (shadow) registers. Every write operation must be done to the shadow, by setting the RD signal, as direct writing to the permanent cannot be done (permanent registers remain cleared, all zeroes).

Such RD signal selects also the source of the data to be read: if RD is clear, data come from the permanent registers; if set, they come from the shadow registers.

We suggest to do the following:

- Remote reset.
- Wait for 120ms.
- Send the RD register at 1 to retrieve the temporary shadow registers.
  Read the registers to check that RD is set
- Send my desired configuration.
- Read all registers and check that RD is still set

[JEVelez]

Hello,

Thank you for your suggestion — you're absolutely right. Health to you as well.

Indeed, the RD signal is essential for correctly accessing and configuring the shadow (temporary) registers. Following the steps you provided allowed me to confirm proper configuration and register access.

Regarding the TSTD bit, I’d like to add a comment:
Its description can be quite ambiguous, as it mentions “normal operation” vs “test mode,” but doesn’t clearly differentiate the source of register values. From my testing, in normal operation (TSTD=1), the device uses values from the programmed OTP registers, while in test mode (TSTD=0), it operates with values from the shadow registers.

Once I properly set the TSTD bit, I was finally able to operate the chip normally using my configuration through the shadow registers.

Thanks again for your helpful input.