LSM6DSV burst read of fifo

[Geoffrey1]

It appears that the longest spi operation that could be used to access the LSM6DSV (and related parts) would read a single fifo entry (7 bytes) and it is not possible to read all the available fifo entries in a single dma operation.  Am I missing something?

 

Geoffrey

[Federica Bossi]

Hi @Geoffrey1 ,

The LSM6DSV sensor's FIFO can be accessed using burst SPI or DMA transfers. The device supports automatic address increment, which allows you to perform efficient multiple byte reads or DMA transfers from the FIFO data output registers (addresses 79h to 7Eh). This means you are not limited to reading a single FIFO entry (7 bytes) at a time; instead, you can read multiple entries in one operation, maximizing flexibility and minimizing communication overhead, especially when flushing large amounts of data from the FIFO

The practical limit is set by the FIFO's total capacity and the host's DMA capabilities, not by the sensor itself. For efficient operation, configure the FIFO and interrupts appropriately, and use burst or DMA reads to retrieve all available FIFO entries as needed.

[Geoffrey1]

I'm sorry, but I don't see it. Yes you can read the seven fifo bytes in a burst, but to read the next 7 bytes in the same burst addressing has to be circular - i.e. restarting at the tag register .

This does not appear to be the case. every read of a fifo entry requires an address be transferred and seven bytes read.

This each read of a fifo entry is a new 8 byte transaction . This isn't the way dma works. While it is possible to create circular transactions, dma doesn't handle the chip selection line necessary to enable back to back transactions