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Associate II
March 17, 2026
Solved

STM32 KiCad PCB design problem

  • March 17, 2026
  • 3 replies
  • 331 views

Hey guys.. new here.. I’m building a small STM32F103 board to read temp and pressure sensors… prototype works fine on breadboard but now want to make PCB..

Problem is.. I tried to route VCC and GND planes in KiCad, but when I refill copper zones some areas near STM32 pins stay unconnected.. DRC shows some warnings for vias too..

Should I place more vias near STM32 or maybe change copper zone settings?? Also decoupling caps.. some are far from pins because of routing.. will that cause issues?? I’m little worried about noise and stability.. never made 2-layer pcb with stm32 before..

Best answer by Peter BENSCH

Welcome @eva_402, to the community!

For questions about using KiCAD, you should check the KiCAD forums or KiCAD learning resources. However, ST provides recommendations for hardware development and layout that you should definitely look at as a starting point: see AN2586 Getting started with STM32F10xxx hardware development.

Regards
/Peter

3 replies

Peter BENSCH
Peter BENSCHBest answer
Technical Moderator
March 17, 2026

Welcome @eva_402, to the community!

For questions about using KiCAD, you should check the KiCAD forums or KiCAD learning resources. However, ST provides recommendations for hardware development and layout that you should definitely look at as a starting point: see AN2586 Getting started with STM32F10xxx hardware development.

Regards
/Peter

eva_402Author
Associate II
April 4, 2026

Thanks for the welcome, really appreciate it :) I’ll check out the KiCad forums for the tool side of things, and that AN2586 doc looks exactly like what I needed for the layout basics. Good to have a proper reference instead of guessing my way through it.

Andrew Neil
Super User
March 17, 2026

@eva_402 wrote:

I tried to route VCC and GND planes in KiCad, but when I refill copper zones some areas near STM32 pins stay unconnected.. ..


So that's a KiCAD problem - nothing to do with the STM32.

As @Peter BENSCH said, you need to go to the KiCAD resources for help in using KiCAD

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.
eva_402Author
Associate II
April 4, 2026

Yeah I get what you’re saying, it’s more of a KiCad behavior than anything STM32-specific. I just posted here since the layout concerns (like decoupling and planes) felt kinda MCU-related too. I’ll check the KiCad forums as well, thanks for pointing that out.

Senior III
March 18, 2026

Although, its not related to this forum as stated above but still as its posted so:

What you’re seeing is pretty normal on 2-layer boards with dense MCUs like STM32. The unfilled areas are usually due to clearance, minimum width, or thermal relief settings in the copper zone ..... not necessarily a real connection issue. First check those settings and make sure pads are actually assigned to the correct net (VCC/GND).

Adding more vias near the STM32 power pins is a good idea .... they help connect planes better and reduce impedance, especially on 2-layer boards. I would suggest you to use a solid ground plane if possible, read these guide to understand planes: https://www.pcbway.com/blog/PCB_Design_Layout/Power_and_Ground_Plane_Design_Considerations_in_PCB_Layout_862aaa8c.html

https://www.aivon.com/blog/pcb-design/the-art-of-grounding-pcb-ground-plane-techniques-for-analog-circuits/

For decoupling caps .... yes, distance matters. If they’re 1-2 cm away, they become much less effective. Try to keep 0.1 uF caps as close as possible to each VCC pin, even if you have to adjust routing. A 10uF can sit a bit farther away, I think its called bulk caps. Read this guide on decoupling caps: https://learn.sparkfun.com/tutorials/capacitors/application-examples

 

eva_402Author
Associate II
April 4, 2026

That actually helps a lot, makes sense now why those areas weren’t filling in. I’ll double check the zone settings and net assignments, I probably messed something there without realizing. And yeah I think I underestimated the decoupling cap placement, I’ll try to move those closer even if routing gets a bit messy. Appreciate the pointers