CPU load and memory usage
Split from this thread as the questions become more generic on embedded systems not related to the STM32.
Hello Team,
We are currently evaluating STM32H563ZI for a production system and would like your guidance on recommended CPU and RAM margin before moving to large-scale deployment.

Based on our current firmware build analysis (STM32CubeIDE Build Analyzer):
-
RAM:
-
Total: 640 KB
-
Used: ~182 KB (≈28.5%)
-
Free: ~458 KB
-
-
Flash:
-
Total: 1 MB
-
Used: ~282 KB (≈27.6%)
-
Free: ~742 KB
-
From a static memory usage perspective, sufficient margin is available. However, our application is load-dependent, and real CPU utilization varies based on field conditions and communication traffic.
We would like clarification and guidance on the following points:
-
What CPU utilization margin (%) is recommended for STM32H5 series devices in production systems (for example, acceptable average and peak CPU load)?
-
What RAM headroom (free heap and stack margin) is considered safe for long-term and 24/7 operation?
-
Are there any STM-recommended best practices for CPU and memory budgeting on STM32H563, especially for applications with variable runtime load?
-
Are there any known considerations related to interrupt load, DMA usage, or RTOS behavior that should be accounted for when defining margin?
Our goal is to validate the MCU selection with sufficient safety margin before mass production and to avoid risks during future feature expansion.
We appreciate your support and guidance on this matter.
