Discontinuous SPI communication clock

[JJAYAR]

Using NUCLEO H723ZG

I made a simple SPI module for communication as master

(this is the only module i am using)

I used the MOOC training on using SPI as a guide for programming

On observing clock

I found it to be discontinuous during transmit cycle - this puts the receiving slave SPI into error

0x84 code

See Scope shots of clock

I was wondering if any one else has seen this before

Thanx in advance for any suggestions/replies

Jay

[TDK]

There is no issue in general with the SPI clock having delays between bytes. Most slaves have no issue with this. What chip are you communicating with?

If you don't want delays, reduce clock speed or consider using DMA.

[JJAYAR]

Hi TDK

Thanx for replying

I was wondering

1) What would cause the clock to place delays ( i am not programmatically asking for delays)

The spi seems to be able to transfer about 13-14 words w/o delay

Why a new delay after 15th word?

2) Why would using DMA get rid of delay?

 

Also, The slave is a custom stm32H723 chip board

 

Jay

 

[TDK]

If the CPU can't keep up with data the SPI needs, there will be a delay between bytes.

Using DMA offloads this responsibility so no delays.

[JJAYAR]

Hi TDK

The dma trick seems to have worked!

Thanx for your help

solved-will close this case now

Jay