Interrupts in EEPROM emulation(AN3969)

[UpStream]

I'm trying to implement "AN3969 EEPROM emulation in STM32F40x/STM32F41x microcontrollers" on STM32F407.

According to the documentation, "Interrupt servicing during program/erase is possible".

However, when actually installed, interrupts stop completely during the erase time.

What is the way around this?

[Tesla DeLorean]

It's an MCU not MPU, I fixed the tagging

If the ALL code / vectors / interrupts are all in RAM it might not stall. The erase or write of the Flash will block attempts to concurrently read from Flash.

[FBL]

Hello @UpStream​,

Additionally, it is possible to relocate the interrupt vectors to a different bank of flash or some place in the user Flash memory that is not affected by the program/erase operation maybe temporarily to ensure uninterrupted interrupt service routine.

[UpStream]

Thanks for the reply.

The EEPROM is using the default values sector 2 and sector 3.

The interrupt vector is also set to the initial value, sector 0. Is this a problem?

​

I am testing by porting "eeprom.c" to the sample code "TIM_TimeBase" using STM32F4DISCOVERY Discovery kit.

I moved most of the functions to RAM, but there is no improvement at all.

The move to RAM is

​

Edit STM32F407VGTx_FLASH.ld

----​

_sidata = LOADADDR(.data);

.data :

{

. = ALIGN(8);

_sdata = .;

*(.data)

*(.data*)

*(.code_in_ram) <--- Insert

. = ALIGN(4);

_edata = .;

} >RAM AT> FLASH

​----

​

Add to my code

----​

__attribute__ ((long_call, section (".code_in_ram"))) void foo(void)               

{                                         

 // Do something here

}

----​

I used

​

Is there any help for me ?​

[UpStream]

Thank you always for your cooperation. 

After that.

Interrupt vectors could also be switched to SRAM, but interrupts stop during Flash erase.

Am I still missing something?

​

// STM32F407VGTx_FLASH.ld //

/* Specify the memory areas */

MEMORY

{

  RAM_BOOT (xrw)     : ORIGIN = 0x20000000, LENGTH = 8K <--- Insert

  RAM (xrw)        : ORIGIN = 0x20002000, LENGTH = 120K

  CCMRAM (xrw)      : ORIGIN = 0x10000000, LENGTH = 64K

  FLASH_BOOT (rx)     : ORIGIN = 0x8000000,

               LENGTH = 32k

  EMULATED_EEPROM (rwx)  : ORIGIN = ORIGIN(FLASH_BOOT) + LENGTH(FLASH_BOOT), 

               LENGTH = 32k

FLASH (rx)       : ORIGIN = ORIGIN(EMULATED_EEPROM) + LENGTH(EMULATED_EEPROM),

               LENGTH = 1024k - LENGTH(FLASH_BOOT) - LENGTH(EMULATED_EEPROM)

}

​

// system_stm32f4xx.c //

​void SystemInit(void)

{

..........​

​ /* Disable all interrupts */

 RCC->CIR = 0x00000000;

​

 memcpy((void*)0x20000000,(void const*)0x08000000,0x1FFF); <--- Insert

​

 /* Configure the Vector Table location add offset address ------------------*/

#ifdef VECT_TAB_SRAM <-- Select define

 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */

#else

 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */

#endif

}