STM32 with Extended Synchronous SRAM CY7C1441KV33 ?

[AAA2]

Use CY7C1441KV33 to expand memory space on STM32H7A3, with the following connections：：

The timing requirements for burst read and write of CY7C1441KV33 are as follows:  

(1)Read timing: First read the data of CY7C1441KV33, and then add 1 to the internal address of CY7C1441KV33.

(2)Write timing: First, add 1 to the internal address of CY7C1441KV33, and then write data to CY7C1441KV33.

 

STM32H7A3 can meet the read timing requirements of CY7C1441KV33. But STM32H7A3 does not meet the writing timing requirements of CY7C1441KV33. May I ask if STM32H7A3 can use CY7C1441KV33?

 

NOTE：

The burst read timing diagram of STM32H7A3 and CY7C1441KV33 is shown below：

STM32H7A3 read timing

CY7C1441KV33 read timing

 

The burst write timing diagram of STM32H7A3 and CY7C1441KV33 is shown below:

STM32H7A3 write timing

CY7C1441KV33 write timing

 

[AAA2]

Merged - this is the same question

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Is there an STM32 that can be connected to Synchronous SRAM CY7C1441KV33 ？

[mƎALLEm]

Hello,

According to the SRAM datasheet it seems it's not regular parallel memory that could be managed by FSMC or FMC with STM32.

The SRAM signals don't seem to be compatible with STM32, especially the address management:

Better to inspire from one of the ST Eval boards for external SRAM connections over FMC/FSMC.

 

 

[AAA2]

Thank you, I also feel that STM32 cannot use Synchronous SRAM CY7C1441KV33.