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Associate
August 14, 2025
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LD1086DT33TR and ESR

  • August 14, 2025
  • 2 replies
  • 954 views

I plan to use the LD1086DT33TR LDO to output 3.3V with an input voltage of 5V. However, I am not aware of the requirements for the ESR (Equivalent Series Resistance) of the output filter capacitor for the LD1086DT33TR, and this parameter is not mentioned in the datasheet. I intend to use either the GRM31CZ71C226ME15L or the CC1206KKX7R6BB226 as the output filter capacitor, and I am considering using two such capacitors in parallel. I wonder if this configuration is appropriate.(Or a 25YXF47MFFC5X11)?

 

Best answer by Peter BENSCH
  1. The stability zone looks essentially the same for all voltages; with a minimum ESR of 1 ohm, you are on the safe side.
  2. On the one hand, the ESR should be as small as possible for a fast response to load changes, but for stable operation it should not fall below the minimum value mentioned under point 1 above.
  3. Electrolytic capacitors probably have a higher ESR anyway, so you don't need to worry about that. The frequency dependence mentioned above is more relevant for MLCCs.
  4. See 3
  5. If you use an electrolytic capacitor, you do not need to connect an MLCC in parallel.
  6. Depending on the type of loads supplied, it is very useful or even necessary to connect an MLCC directly to that load in order to compensate for high-frequency load changes. As already mentioned, the track or supply line from the voltage regulator to the load then acts as an additional 'ESR'. If the supply line is very short and its resistance is in the order of magnitude of the total ESR of the MLCC, it may be useful to implement a low-pass filter with a small choke of e.g. 100µH...1mH between the voltage regulator and the load to mitigate the problem.

 

2 replies

Peter BENSCH
Technical Moderator
August 15, 2025

Welcome @kevin_root, to the community!

The LD1086 is a quasi-LDO, which, like most older LDOs, still has the problem of requiring a device-dependent minimum ESR for stable operation, because otherwise it can tend to oscillate at high frequencies.

For the LD1086, you will find some tips for stable operation in the data sheet in figures 20 (Stability for adjustable) and 21 (Stability for 2.85 V), from which a minimum ESR of approx. 500 mohms (ADJ) and 250 mohms (2.85 V) can be read. Although the regulator seems to operate on DC, the possible rate of change of the load must still be taken into account for the frequency, so that approximately 1kHz should be assumed depending on the application.

Today's MLCCs, like the types you have selected, have a strong frequency dependence of the ESR, which for the CC1206KKX7R6BB226 (Yageo) is approximately 3 ohms at 100 Hz and has a minimum of 4 mohms at 200 kHz; at 1 kHz, the ESR is approximately 250 mohms. The GRM31CZ71C226ME15L (Murata) shows a very similar curve, but at 1kHz it is only 150mohms. Several such capacitors in parallel at the output reduce the ESR even further. For maximum stability, I recommend in any case, especially when connecting output capacitors in parallel, a series resistor to the capacitor(s) of about 250mohms as an artificial ESR.

As far as the size of the capacitor is concerned, a 10µF is perfectly adequate, but it should be located as close as possible to the LD1086. However, MLCCs also have a pronounced dependence of the capacitance value on the applied DC bias. In your case, at 3.3V, the Yageo capacitor has approx. 30% less capacitance and the Murata capacitor approx. 13% less.

Taking all other tolerances into account, a single 22µF capacitor should be perfectly adequate as an output capacitor. If you want to use a higher capacity for your application, you can move the additional capacitors closer to the load, where the ohmic resistance of the supply line will then act as ESR, preventing oscillation.

Hope that helps?

Good luck!
/Peter

Associate
August 15, 2025

Thank you very much for your reply. Then, when does the situation of "it can tend to oscillate at high frequencies" occur, and what are the consequences of such oscillation? If MLCCs are not used, then when using electrolytic capacitors, we shouldn't need to consider the issue of ESR, right? For example, the 47µF/25V electrolytic capacitor (model: 25YXF47MFFC5X11). In addition, is there any LDO that doesn't require consideration of MLCC ESR? It would be perfect if it is pin - compatible with LD1068.

Peter BENSCH
Technical Moderator
August 15, 2025

Well, lots of questions, but I'll try to answer them:

  • When exactly oscillation occurs is hard to predict, the tendency to do so can occur due to various external conditions: sudden load jumps, pulses on the input line, etc. For this reason, the causes of this tendency should be eliminated, in the case of minimum ESR with artificial ESR or with tantalum or electrolytic capacitors. If the regulator oscillates, no DC voltage can be measured at its output, but at least a DC voltage superimposed by a more or less strong high-frequency signal. As this situation can lead to the destruction of the supplied devices, it should be avoided.
  • Quasi LDOs were developed in the last millennium, when electrolytic capacitors were still prevalent and MLCCs were still rare or expensive. Nevertheless, an MLCC can also be used if it has a series resistor to simulate an ESR.
  • As a rule, many newer LDOs can work stably with MLCCs, but this is also explicitly mentioned in the respective data sheet. However, they usually also have additional features, which is why they are often more expensive. Decades-old regulators such as the LD1086, however, are widely used, are produced in very large quantities and are therefore comparatively inexpensive.
  • It is probably cheaper or easier to connect the series resistor mentioned for minimum ESR in series with the MLCC (or to use an electrolytic capacitor) than to look for an MLCC-capable LDO that also has to be pin-compatible.
Associate
August 19, 2025

        Thank you very much for your reply. The deeper my understanding grows, the more anxious I feel. I discussed this issue with my colleagues and found that no one has paid attention to it—we have been using MLCCs all along. We tested the output of the LDO and found no abnormalities, and the system remains stable. What could be the reason for this? (How should I simulate this problem? I wonder if, since there is no oscillation occurring, it is because chips like the MCU, when running at full speed, draw high-frequency current from the capacitors on their own power supplies, thus not affecting the LDO? After carefully checking the circuit diagram, I noticed that the 3.3V output from the LDO goes through a bead and a capacitor before supplying power to the MCU.)

        I was extremely shocked when I saw point 6 in your reply: *"Whether using tantalum capacitors, electrolytic capacitors, or milliohm-level resistors in series with MLCCs, all three methods will still have the problem mentioned in point 6."* It seems that designing an LC circuit is necessary.