PCB design and antenna guide lines

[Naresh1]

I am currently designing an NFC reader PCB based on the ST25R3916B. Could you kindly share the recommended PCB stack-up configuration and the routing guidelines for the NFC antenna? I have also attached images of the PCB layer stack-up that I am currently using. Could you please review them and confirm whether it is appropriate?

[Ulysses HERNIOSUS]

Hi Naresh1,

did you find the appnotes on https://www.st.com/en/nfc/st25r3916b.html#documentation ? E.g. AN5240 Layout recommendations for the design of boards with the ST25R3916/16B, 17/17B, 18, 19B, and 20/20B devices  and AN5584 ST25R39xx NFC reader thermal design and AN5276 Antenna design for ST25R3916/16B, ST25R3917/17B, ST25R3918, ST25R3919B, and ST25R3920/20B devices among others. 

Also please feel free to inspect the layout files for our demo boards.

Please let me know if these documents answer your questions!

 

BR, Ulysses

[Travis Palmer]

Hello Naresh1,

 

This is our recommended PCB layer stack:

 

• Total thickness: ~1.6mm
•  
• Pro:
• Signal and power lines separated -> Good EMC performance (shielding of power plane/lines and signal lines)
• More flexibility regarding trace routing -> Feasible for complex ICs and/or circuits.
• Tight coupling between signal layers and the return planes
• Good compromise between EMC performance and costs
• Contra:
• Not feasible for very complex ICs and/or circuits routing (which require more routing layer), ok for ST25R
• Loss in interplane capacitance between the power and ground planes due to distance between power and ground plane.
• Additional parasitic capacitance (~4pF, layout dependent) on the matching network traces.

Information about our PCB layout guidelines can be found in the associated application note. 

For Example ST25R500: AN6279 -  Layout recommendations for the design of boards with the ST25R300,
ST25R501 and ST25R500 device

This AN6279 will soon receive an update to also cover the ST25R210.

BR Travis