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Associate II
September 30, 2024
Solved

Configuring the MPU on STM32H747

  • September 30, 2024
  • 1 reply
  • 2398 views

Hello,

I am wondering how to configure the MPU in CubeMX (6.12.1) so that I can enable the D-Cache and the I-Cache. I know the instructions that enable the caches (SCB_Enable_x_Cache(); replace _x_ with I or D) but was wondering on the configuration CubeMX generates.

I am using the STM32H747I-Discovery board and CubeMX produced:

MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.BaseAddress = 0x0;
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
MPU_InitStruct.SubRegionDisable = 0x87;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

HAL_MPU_ConfigRegion(&MPU_InitStruct);
/* Enables the MPU */
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

Does this seem correct? My questions arise from the lines:

MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;

HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);

It sounds like it is disabling access to the memory. I read through the reference manual and looked through the code (core_cm7.h, stm32h7xx_hal_cortex.h) but could not find a clear answer to how I would want the MPU configured.

I would like to have the caches enabled as I want the highest performance from the M7 core.

Thank you for your time and assistance with this question

Best answer by TDK

To enable data and instruction cache, enable them in the CORTEX_M7 tab, just above the MPU. No additional MPU configuration is needed as the default will allow them to be cached.

TDK_0-1727741985758.png

Lots of information in Level 1 cache on STM32F7 Series and STM32H7 Series.

 

In your code, the "MPU_InitStruct.SubRegionDisable = 0x87;" line prevents the MPU settings you have from affecting the RAM, which is where data is stored. Nicely explained here by @mƎALLEm:

Solved: Information about MPU settings for the STM32H743 - STMicroelectronics Community

 

1 reply

TDK
TDKBest answer
Super User
October 1, 2024

To enable data and instruction cache, enable them in the CORTEX_M7 tab, just above the MPU. No additional MPU configuration is needed as the default will allow them to be cached.

TDK_0-1727741985758.png

Lots of information in Level 1 cache on STM32F7 Series and STM32H7 Series.

 

In your code, the "MPU_InitStruct.SubRegionDisable = 0x87;" line prevents the MPU settings you have from affecting the RAM, which is where data is stored. Nicely explained here by @mƎALLEm:

Solved: Information about MPU settings for the STM32H743 - STMicroelectronics Community

 

"If you feel a post has answered your question, please click ""Accept as Solution""."
Associate II
October 3, 2024

Hi @TDK,

Thank you for the additional information. I had enabled the MPU but did not understand the setting in CubeMX. 

I did not make any changes in CubeMX for the MPU (except enable it) when it generated the code. The "MPU_InitStruct.SubRegionDisable = 0x87" was what CubeMX generated, I did not even know what exactly it meant.

The links you provided were helpful.

Thank you again for your assistance!