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Associate III
April 30, 2025
Solved

How to use the GPIO pin of the CN7 on the STM32N6570-DK board

  • April 30, 2025
  • 2 replies
  • 810 views

I am working on a STM32N6570-DK board and I noticed that the CN7 of the board can be modified as digital I/O pin or an ADC. So I want to make sure that when I use the A1 port of CN7 for example, and I want to use this port as a usart_tx. Then I can directly enable the PC10 as a usart_tx and disable the PA9 right? And I want to make sure that the modification don't damage the ADC function of PA9, since the MCU actually accept 0-1.8V and the 3.3V is too high.

Best answer by RomainR.

Hi @Z-YF 

Your understanding of the diagram is correct.
If you plan to use CN7-A1 as USART1 digitally with VDD levels of 3.3V, the GPIO PA9 is protected by the AOP U8B and its input divider bridge (signal ARD_A1). When PC10 = 3.3V, PA9=1.8V. 

Best regards,

Romain,

2 replies

Z-YFAuthor
Associate III
April 30, 2025

The arrangement of the ports are shown in the picture below.

Andrew Neil
Super User
April 30, 2025

The board schematics are available on the 'CAD Resources' tab of the Product Page:

https://www.st.com/en/evaluation-tools/stm32n6570-dk.html#cad-resources

A complex system that works is invariably found to have evolved from a simple system that worked.A complex system designed from scratch never works and cannot be patched up to make it work.
Z-YFAuthor
Associate III
April 30, 2025

Thanks for that .

And I concluded the circuit looks like the picture below. So if I want to use the digital pin and set it as an usart_tx, I can directly use it, right?(The amplifier turns the 0-3.3V into the 0-1.8V).

RomainR.
RomainR.Best answer
ST Employee
April 30, 2025

Hi @Z-YF 

Your understanding of the diagram is correct.
If you plan to use CN7-A1 as USART1 digitally with VDD levels of 3.3V, the GPIO PA9 is protected by the AOP U8B and its input divider bridge (signal ARD_A1). When PC10 = 3.3V, PA9=1.8V. 

Best regards,

Romain,

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