disable hardware GoodCRC for SOP messages in UCPD for Active Cable (EMarker) applications?
Hello STM32 Community,
I am currently developing a USB Type-C Active Cable application using an STM32 with the official USB-PD Middleware.
My Goal: The MCU needs to behave as an EMarker/Active Cable. Therefore, it should:
- Ignore all SOP messages on the CC line (no response and no GoodCRC ).
Only respond to SOP' and SOP'' messages.
- Able to monitor (Snoop) SOP messages exchanged between the Source and Sink to maintain state awareness.
The Problem: In the current X-CUBE-USB-PD middleware and STM32CubeMX configuration, there is no explicit option to disable SOP handling while keeping SOP'/SOP'' active. Since GoodCRC is typically handled by the UCPD hardware autonomous logic to meet the strict tTransmitSOP timeout, the hardware automatically sends a GoodCRC when it detects a valid SOP message CRC, even if the firmware isn't intended to process it.
Technical Details & Questions: I am looking for a way to bypass or disable the hardware-level auto-response for SOP only.
Register Control: Is there a specific bit in UCPD_CR or UCPD_CFG1/2 that can mask SOP detection while allowing SOP'/SOP''?
I noticed the RXORDSETEN bits in stm32g0b1xx.h. If I only enable bits for SOP' and SOP'', will the hardware still generate a GoodCRC for incoming SOP packets?
Middleware Bypass: If the hardware doesn't support selective GoodCRC, has anyone successfully implemented a workaround in the USBPD_dpm_core.c or the lower-level stm32xx_it.c to drop SOP packets before the hardware triggers the TX response?
Active Cable Mode: Does ST provide a specific configuration or a "Silent SOP" mode for UCPD when the device is defined as a Cable Plug?
Any insights on which registers to manipulate to achieve "SOP silence" would be greatly appreciated.
Thank you in advance!
