DMA STM32G070

[TEl B]

I can't get TIM1 to trigger DMA in my code (main.c)
Am I missing something? 

[Saket_Om]

Hello @TEl B 

Did the DMA transfer work without TIM triggering?

[TEl B]

Yes

[TEl B]

Problem is not solved.

[waclawek.jan]

In 'G0, GPIO are connected to the cpu-private IOPORT bus, not accessible from the rest of the chip, i.e. DMA cannot access GPIO in 'G0.

JW

[TEl B]

Thank you very much.
Writing to BSRR or BRR register is also impossible?

[waclawek.jan]

No that path is not possible.

That diagram is simplified in the fact, that the matrix consists of masters and slaves. Only master can initiate a transfer, providing address and direction of transfer and actively produce/consume data; and only slave can passively "consume" or "produce" the data of that transfer according to the address and direction provided by master. In other words, while the double-ended arrows do indicate the bi-directional flow of data, they don't correctly indicate the unidirectinal flow of address and control.

JW

[TEl B]

Thank you very much for your remark, you got me thinking.

I'm going to drive the WS2812B lamps with multiple parallel alternate outputs. One alternate output was already working.

What surprises me is that ST didn't make any effort to support my question.