How to correctly enable USB with DMA and DCache on NUCLEO-H723ZG?

[featherbits]

I have enabled USB with the following settings:

Following USB middleware is enabled like so:

In the linker script I have moved everything from DTCMRAM to RAM.

Additional section is specified like so

.dma_buffer :
{
 *(.dma_buffer)
} >RAM_D2

And used like so:

/** Received data over USB are stored in this buffer */
__attribute__((section(".dma_buffer")))
uint8_t UserRxBufferHS[APP_RX_DATA_SIZE];

/** Data to send over USB CDC are stored in this buffer */
__attribute__((section(".dma_buffer")))
uint8_t UserTxBufferHS[APP_TX_DATA_SIZE];

 At this point USB device enumerates but looks like no descriptors are transferred to the host.

I also tried to enable MPU like so:

But that did not do the trick.
However, when RAM region base address (0x24000000) is used instead of RAM_D2 (0x30000000) for MPU, device enumerates correctly:

and there is no need for:

__attribute__((section(".dma_buffer")))

on rx and tx buffers anymore.

Now the question. How to correctly place only the USB related stuff to non-cacheable region so that rest of the application can work with cache enabled?

In summary, Currently I have disabled cache with MPU for entire region (RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 128K). USB with DMA works, but it means that rest of the application also is experiencing disabled cache which is not what I want. I only want to disable cache for USB stuff. It is not enough just to place rx and tx buffers in non-cacheable region. From findings, it seems that also descriptors and potentially other stuff must ble placed in non-cacheable region as well.

[FBL]

Hi @featherbits 

 

Did you check this article How to correctly setup your application to use USB?

Actually, USBHS1 and USBHS2 are located in D2 domain and have no interconnection with DTCM RAM which is the default memory used in approximately all USB projects. Therefore when enabling the internal DMA USB, projects do not work, as DMA will not be able to access the data buffers placed in DTCM and it results in DMA transfer error.

With data cache enabled, you should also be careful to handle it properly.

[featherbits]

I did check that post. That post gave me a hint that I have to move away from DTCM RAM which I did. That post only proves a point that DCache is the main culprit but does not lay down steps necessary to fully configure the entire project. I think the only thing left now is to correctly decorate USB related stuff with correct attributes, so that cacheable and non cacheable data can be separated. Now I have everything sitting in non cacheable are (set by MPU).

[AScha.3]

Hi,

>  At this point USB device enumerates but looks like no descriptors are transferred to the host.

Ok, but you show just the st-linkV3 enumeration, on st-link usb connection.

But the user usb is the other usb , CN13 .

So connect there a usb cable to PC also, then you see...enumerates or not.

btw

What kind of device it should be ? set it in Cube ? VCP ->

[featherbits]

---

@AScha.3 wrote:

Ok, but you show just the st-linkV3 enumeration, on st-link usb connection.

But the user usb is the other usb , CN13 .

---

Not correct. ST-Link and VCP are connected to the same USB hub. It can be seen on the original posts. Device with blue background is the VCP device.

[featherbits]

@FBL @AScha.3 I updated question in my original post. I think previously it was easy to misunderstand what actually I am looking for. Just to recap, I managed to enable USB with DMA and device enumerates correctly, but at the expense of placing everything to non-cacheable region (updated linker script to use region starting at 0x24000000 for everything instead of 0x20000000 which was the default). I only want to do this for USB related stuff. By just placing tx and rx buffers to non-cacheable area does not work. I think more stuff from USB HAL side must be placed to that area. I have no idea what and how to do the separation. 

[FBL]

Hi @featherbits 

It is not enough to move only UserRxBufferHS UserTxBufferHS to a non cacheable section.
The complete USB data path must be reviewed to identify all DMA buffers and descriptors.

Using MPU to mark the entire SRAM region as non cacheable will work, but as you noted, it is not an ideal solution because it impacts the rest of the application.

Typically, the recommended approach is:

1. Keep the application in cacheable memory
2. Reserve a dedicated non cacheable region for USB DMA buffers and descriptors
3. Place all USB DMA accessed buffers and descriptors in that region
4. Ensure cache maintenance is applied where needed for any cacheable data exchanged with USB.