STM32 MCUs Embedded software

This is to document various uses of delays like HAL_Delay() in STM32 code. I have found 2 decent uses  1. Put at the start of  /* USER CODE BEGIN 2 */ to stop the code from executing when we are reprogramming the board. 2. Put at the start of  /* USER CODE BEGIN 2 */ to give time to properly initialize DMA related functionality. /* USER CODE BEGIN 2 */ HAL_Delay(2000); HAL_UARTEx_ReceiveToIdle_DMA( &huart7, gsm_response_buffer, GSM_RESPONSE_BUFFER_SIZE); __HAL_DMA_DISABLE_IT(&hdma_uart7_rx, DMA_IT_HT); /* USER CODE END 2 */ without the delay the DMA reception was not working.   Please put any other / any modification anyone find / know here to make it as a central repository. Edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code

Hello Saket_Om, Now is better :). Next challenge is how to convert it for my target. I am using STM32u585Qii3. It seems there is no straight way in STM32Cube to migrate between controllers with different packages.   Split from the thread below. (new question) Re: STM32u5 ADC not reading properly - STMicroelectronics Community

I have an SPI slave running on STM32L4 in DMA mode.   Here is the basic structure (simplified for this posting): #define NSS (HAL_GPIO_ReadPin( SPI3_NSS_GPIO_Port, SPI3_NSS_Pin )) #define BUFFERSIZE 32 uint8_t SpiTxBuffer[BUFFERSIZE], SpiRxBuffer[BUFFERSIZE]; typedef enum { Idle, Wait, Abort, Done } State_t; State_t State = Idle; int main(void) { /* Usual MX boilerplate here. */ while(1) { switch (State) { case Idle: if(!NSS) { if( HAL_SPI_TransmitReceive_DMA( &hspi, SpiTxBuffer, SpiRxBuffer, BUFFERSIZE ) != HAL_OK ) { Error_Handler(); } State = Wait; } break; case Wait: if(NSS) { if( HAL_SPI_Abort_IT(&hspi) == HAL_OK) { State = Abort; } else { Error_Handler(); } } break; case Abort: break; case Done: DoSomethingWithTheData(); State = Idle; } DoSomethingElse(); /*Do some task while waiting for SPI to arrive*/ } } void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) { State = Done; } void HAL_SPI_AbortCpltCall

I'm relatively new to STM32 and it's my first time working with DMA so this will probably be a very basic question.I'm using STM32G474 and I want to have 3 channels of advanced timer TIM8 working in "PWM generation CHx CHxN" mode. At a later stage I'm looking to run FOC on them, but for now I just want to change the duty cycle of each channel period by period, by reading the duty cycle for the next period from a predefined table and transferring the duty cycle value using circular burst DMA to update all 3 channels at the same time without software overhead.These are my DMA settings for TIM8 in the ioc fileI can't find the settings for which register i want to write to using DMA. I have ChatGPT telling me that DMA can only write to CCR register and Gemini telling me I can set which register to write to in the ioc. Both are pointing me to reference manual RM0440 (https://www.st.com/resource/en/reference_manual/dm00355726.pdf), but I'm getting overwhelmed there and can't find anything re

I want to use the standalone CRC module to offload calculations AND transfers from CPU - using purely DMA memory transfers - is this possible on the STM32G474RE?

Hello @Community, I am working on the STM32F746NG board. In my application, I want to communicate with a PLC using the EtherNet/IP communication protocol to exchange real-time data. The problem I am facing is that my board does not respond to ping when FreeRTOS is enabled. Without FreeRTOS, the board is pinging correctly. Has anyone faced this issue before? If yes, please guide me on how to resolve it. Any suggestions or solutions will be greatly appreciated. Thank you!

Hello,I need to communicate with a component whose configuration register expects a 9-bit value. However, my current SPI setup sends data in 8-bit chunks.In this case, what would be the correct approach? Should I send two bytes back-to-back? Or would it be better to make this configurable in main.c so that the behavior can be adjusted easily?If you were in my place, how would you handle this?   static void MX_SPI3_Init(uint32_t bit_size) { /* USER CODE BEGIN SPI3_Init 0 */ /* USER CODE END SPI3_Init 0 */ /* USER CODE BEGIN SPI3_Init 1 */ /* USER CODE END SPI3_Init 1 */ /* SPI3 parameter configuration*/ hspi3.Instance = SPI3; hspi3.Init.Mode = SPI_MODE_MASTER; hspi3.Init.Direction = SPI_DIRECTION_2LINES; hspi3.Init.DataSize = bit_size; // <-- here hspi3.Init.CLKPolarity = SPI_POLARITY_LOW; hspi3.Init.CLKPhase = SPI_PHASE_1EDGE; hspi3.Init.NSS = SPI_NSS_SOFT; hspi3.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; hspi3.Init.FirstBit = SPI_FIRSTBIT_MSB

Hi，I would like to in-live upgrade firmware of STM32F407 through USART1, that means  in-application program(IAP) . If I remember right, there need a trigger signal from key meanwhile NRST is low.My question is that the Key signal could be connected to any GPIO I/O of STM32F407 except those dedicated pin, right?  Is there special point to care about selection of  Key I/O pin? Thanks in advance!Best regards!Jason

Hi everyone!I'm having trouble in measuring the VBAT through ADC. I'm using 3.3V on aNUCLEO_476 board to connect to VBAT and when I measure VBAT through ADC,I cannot obtain the value of the VBATHere's my code:void MX_ADC1_Init(void) { /* USER CODE BEGIN ADC1_Init 0 */ /* USER CODE END ADC1_Init 0 */ ADC_MultiModeTypeDef multimode = {0}; ADC_ChannelConfTypeDef sConfig = {0}; /* USER CODE BEGIN ADC1_Init 1 */ /* USER CODE END ADC1_Init 1 */ /** Common config */ hadc1.Instance = ADC1; hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; hadc1.Init.Resolution = ADC_RESOLUTION_12B; hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; hadc1.Init.LowPowerAutoWait = DISABLE; hadc1.Init.ContinuousConvMode = ENABLE; hadc1.Init.NbrOfConversion = 7; hadc1.Init.DiscontinuousConvMode = DISABLE; hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRI

Hello,I can run older TCP/IP examples on my F767 Nucleo but I want to start fresh and understand what is going on.Basic project started with CubeIDE/CubeMX code generation. FreeRTOS, LWIP, fixed IP => Does not answer to ping. Turns out MX_LWIP_Init() never returns.If I step into the ethernetif initialisation code, I see that anywhere  HAL_Delay(ETH_REG_WRITE_DELAY) is called within stm32f7xx_hal_eth.c, it never returns, unless I step into it from the debugger and go step by step (and see uwTickFreq increment) until HAL_Delay returns.I understand the time base is a common issue often because of the interrupt priorities, but I think I have everything setup correctly. I am using Timer 6 as a tick source, with its IT priority set to 0. Again, I do see uwTickFreq increment if I run the code step by step.I removed MX_LWIP_Init() from the code and added some HAL_Delay(1000) in the for(;;) loop in the defaulttask and it returns every second, which tells me

Hi,I’m working on an STM32F767 custom bootloader with two application slots:Main Application Slot → starts at 0x08040000Backup (Factory) Slot → starts at 0x08100000I have written a bootloader that checks both slots and jumps to the valid application: SCB->VTOR = app_base; // Set vector table offset __set_MSP(*(uint32_t*)app_base); // Set initial stack pointer void (*app_reset_handler)(void) = (void*)(*(uint32_t*)(app_base + 4)); app_reset_handler(); // Jump to reset handler ProblemI tested two scenarios: Using app_main.ld (FLASH origin = 0x08040000)I built one binary with FLASH start = 0x08040000.I program the same binary into both slots:Slot 1 → 0x08040000Slot 2 → 0x08100000Result:Main slot works :white_heavy_check_mark:Backup slot fails :cross_mark: — the application does not start.QuestionThe binary built for 0x08040000 fails when executed from 0x08100000?Is there a way to make one application binary run from both flash addresses?Edited to apply source code formatt

I'm working on a STM32C071RB, which I've managed to generate PWM pulses as desired. However, I try to more than once while the chip is running, it stops working.My main.c file:#include "main.h" #define PWM_HI (12) #define PWM_LO (6) TIM_HandleTypeDef htim1; DMA_HandleTypeDef hdma_tim1_ch1; uint8_t wr_buf[32] = {0}; void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_DMA_Init(void); static void MX_TIM1_Init(void); void led_set_RGB(uint8_t r, uint8_t g, uint8_t b) { for(int i = 0; i < 8; i++){ wr_buf[i] = (g & (1 << i)) ? PWM_HI : PWM_LO; wr_buf[i + 8] = (r & (1 << i)) ? PWM_HI : PWM_LO; wr_buf[i + 16] = (b & (1 << i)) ? PWM_HI : PWM_LO; } } void led_render() { while (HAL_DMA_GetState(&hdma_tim1_ch1) != HAL_DMA_STATE_READY) {} HAL_TIM_PWM_Start_DMA(&htim1, TIM_CHANNEL_1, (uint32_t *)wr_buf, 32); } void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { if (htim->Instance == TIM1) { // Sto

Hey all,For reference I am enabling the https server using NetxDuo Stack for firmware update in my device.Initially we were using Internal Flash but now we are interested in External Flash particularly SDRAM. I was able to boot the application code from SDRAM, however i am facing a problem, whenever i call a rest API like GET request a hardfault occurs where the stack traces shows it is originated over _nx_crypto_sha256_update() function in the nx_crypto_sha2.c file over the use the memcpy(). The strange thing is everything works with no hardfault when application work in Internal Flash.Furthermore, I am able to run RTOS on SDRAM and i can ping my IP on ethernet as well.Kindly someone help me out for this, i will be grateful.Also if i should report this behavior somewhere else?Thanks

Hi!I'm having an issue with the CDC class for USB on my STM32L476 board. I am using the Receive function in usbd_cdc_if.c file to track incoming Modbus traffic from USB. I am noticing that when I write multiple registers (function code 0x10) to the slave using Modbus Poll Software, the incoming buffer always has the last byte as 00. Here are some images to help explain:The following image is a Communication Log from Modbus Poll Software that shows the Modbus Frame being sent:Notice the highlighted portions, which are the CRC Lo and CRC Hi bytes. I also confirm with a USB sniffer program that these exact frames are being sent to the slave. Also note that the first frame is function code 0x06 (Write Single Register), and the remaining frames are function code 0x10 (Write Multiple Registers). Now, here is the incoming Buf in usbd_cdc_if.c, printed to the terminal right away:Notice that for the first frame (Write Single Register), the CRC bytes at the end are intact and matches what w

Hello everyone,I am using Nucleo H745ZI dual core and I want to communicate intercore by OpenAMP.The ST only giving example send message from core M7 to M4. But I want to send message from core M4 to M7, I tried follow the OpenAMP flowchart but not working.Do anyone has the example of OpenAMP send message from M4 to M7?

I'm trying to drive the PWM of an STM32G0 but the waveform generated had an inconsistent period between bit 0 and bit 1, and I can't understand why I'm using TIMER 4 on Channel 2. On the main.c I'm initializing MX_DMA_Init void MX_DMA_Init(void) { /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); /* DMA1_Channel2_3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0); HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); } and TIM4 configured as  void MX_TIM4_Init(void) { /* USER CODE BEGIN TIM4_Init 0 */ HAL_TIM_Base_DeInit(&htim4); /* USER CODE END TIM4_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; TIM_MasterConfigTypeDef sMasterConfig = {0}; TIM_OC_InitTypeDef sConfigOC = {0}; htim4.Instance = TIM4; htim4.Init.Prescaler = 0; htim4.Init.CounterMode = TIM_COUNTERMODE_UP; htim4.Init.Period = 60 - 1; htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE

Hi,I'm getting build error after configuring the ethernet with LWIP. not sure what is the issue.Attaching the screenshot for the reference.attaching the code for reference. please help me to debug. as I'm facing this for ethernet configuration. what additional changes needs to be done in the flash or somehwhere as its memory related issue.Thanks,Harshitha

Hi guys, I have a STM32 NUCLEO-H753ZI board and the overall goal is to run open62541. In order to do that, I need a working LwIP stack and Ethernet connection. I have done a lot of research and tried multiple settings, but can´t get it working. Below, I´ll describe what I have done so far / settings in the .ioc I have made.It would be awesome if you could tell me, where my mistake is.  Using STM32CubeIDE Version: 1.19.0 Build: 25607_20250703_0907 (UTC). Clock Configuration:Input frequency = 8MHz -> PLL Source Mux = HSE -> System Clock Mux = PLLCLK (Enable CSS) -> SYSCLOCK = 400 MHz -> D1 CPRE Prescaler = /1 -> 400 MHz -> HPRE Prescaler = /2 -> 200 MHz-> D1 PPRE, D2 PPRE1, D2 PPRE2, D3 PPRE = /2 System Core:RCC: HSE = BYPASS Clock SourceLSE = CrystalPower Regulator Voltage Scale = Power Regulator Voltage Scale 1SYS:Timebase Source = TIM6NVIC:Ethernet global interrupt = Enabled, Preemption Priority = 5Ethernet wake

I'm creating an I3C target device.  It uses an STM32U385RG as the microcontroller.  According to the reference manual most bits of the Provisional ID are fixed and cannot be configured.  This doesn't seem to allow for creating an I3C target device using my own MIPI manufacturer ID.  Is that correct?  Or is there some other way to provide a fully customizable Provisional ID?If not configurable this seems like it makes the Provisional ID useless as it will be identical for all I3C target devices from all designers at all companies...

I want to use N657B0 to drive VD55G0, and the camera side can already enter the Stream state. After I use the function HAL_DCMIPP_CSI_PIPE_Start, I track the variable csi_instance through single-step debugging and find that several bits in its SR1 register are inconsistent with the normal state. And I find the defination about these.The normal state is 1 but I get 0.Could you please tell me what the reason for this might be? Is the issue caused by a voltage supply problem in the hardware connection, or by inadequate rate matching in the port?That is my configuration. 

Hi I am using Timer2 with Prescaler 83 and up counter of period 49 to be triggered after every 50us. But I am using an ADC and I want to turn it on every 330us. So after 6 interrupt triggers, I turn on the ADC but I need to generate a 30us delay before each ADC turn ON. I want this to occur infinitely in a loop. I have tried using a counter function as below void ADC_Delay(uint16_t us) { __HAL_TIM_SET_COUNTER(&htim2, 0); while (__HAL_TIM_GET_COUNTER(&htim2) < us); }  But I am seeing this delay only on the first loop and not getting the delay in subsequent loops before ADC is turned ON. I have tried various methods even using DWT count and I am still facing the same issue. Please help me solve this bug. Thanks & Regards Srinivas Edited by ST moderator to be inline with the community rules especially with the code sharing. In next time please use </> button to paste your code. Please read this post: How to insert source code

Hello,I am working with the STM32N6570-DK board and the MB1854B camera module.I am using the ST-provided example code:https://github.com/STMicroelectronics/STM32CubeN6/tree/main/Projects/STM32N6570-DK/Applications/DCMIPP/DCMIPP_ContinuousMode This example works fine — I can display the live camera feed on the LCD.Now I want to enable the HDR (High Dynamic Range) feature of the MB1854B sensor.My questions are:Which part of the example code needs to be modified to enable HDR?Is there a register configuration to switch the sensor to HDR mode?Is there an ST-provided driver or initialization sequence for HDR mode example?I am looking for guidance or documentation on which registers to configure and where to modify the code so that the captured image is in HDR mode and displayed properly on the LCD.Thanks in advance!

Hi, I am successfully builded and flashed TFM_Azure_IoT application at X-CUBE-AZURE(v2.3.0) package. You can see teraterm port output at attachment.I looked in to MCU software packages for B-U585I-IOT02A i found "STM32Cube_FW_U5_V1.8.0\Projects\B-U585I-IOT02A\Applications\SBSFU" application that runs test for protection. In X-CUBE-AZURE(v2.3.0) test_protections header and source file name and locations changed."B-U585I-IOT02A\Applications\SBSFU\SBSFU_Appli\NonSecure\Inc\test_protections.h" to "B-U585I-IOT02A\Applications\TFM_Azure_IoT\TFM_Appli\Secure\Inc\test_protections.h" test_protections header file moved to secure app folder. "B-U585I-IOT02A\Applications\SBSFU\SBSFU_Appli\NonSecure\Src\test_protections.c" "B-U585I-IOT02A\Applications\TFM_Azure_IoT\TFM_Appli\Secure\Src\app_rot_test.c" test_protections source file moved to secure app folder and changed name. When try to run the test at non secure side its giving me error undefined reference to `TEST_PROTECTIONS_Run'. Why im getting

A couple questions on using the PSRAM on the STM32H7S7 DK. The "XSPI_PSRAM_MemoryMapped" example configures the XSPI module to have a max transfer length of 0, indicating continuous streaming without wrap can be used. However, the datasheet for APS256XNN only lists wrapping burst modes, no continuous streaming. Shouldn't the MaxTran field be set to match the burst wrap of the part? For example, setting the PSRAM to a 2k burst would be accompanied by:hxspi1.Init.Refresh = 2048;As an cleaner alternative to manual register writes, I also tried using the "External Memory Manager" Middleware to work with the on-board PSRAM, but it didn't work. Is the APS256XNN PSRAM not supported by this middleware?

recently i want to control the SWD function manually by external pin level, in F1 HAL library,there are some defintions to configure this,like above, after call __HAL_AFIO_REMAP_SWJ_DISABLE(),when i connect MCU by jlink debugger，it fails， so it means this definition effect，but after call __HAL_AFIO_REMAP_SWJ_NOJTAG(),debugger still cannot connect the mcu,I try some time,then i find, when enable SWD,I must call __HAL_AFIO_REMAP_SWJ_ENABLE(),why this. i have test on stm32f103c8t6 and stm32f103vet6,both show the same result, thanks.brief:why i must call __HAL_AFIO_REMAP_SWJ_ENABLE() not only __HAL_AFIO_REMAP_SWJ_NOJTAG() after i disable SWD