STM32 MCUs Embedded software

Hello,We are thinking of switching from STM32F446 MCU to STM32U5A5 MCU in our device which is still in R&D.We are coding as bare metal. Since we are working with battery, low power is important for us. Also, our Quad SPI and USB HS work is critical and necessary.We have a problem. ST was giving the driver as USB_Device in STM32F446. However, ST does not give a ready driver in STM32U5A5. For this reason, there are a few things we do not understand.1) Do we have to use Azure RTOS to work with USB HS?2) Can we work with USB HS as bare-metal?3) Doesn't ST really have a driver for USB HS?4) How should the configurations for USB HS CDC be made in the .ioc file?5) Do we need to write the driver ourselves?Can you give us detailed information on the subject?Thank you for your help?

My project is a two-player Pong game using two joysticks, with each joystick controlling one paddle. The user interface was created using Touch GFX. The board is an STM32F429, and I have configured ADC1 to use channels 0 and 8. I’m using interrupts, but both paddles are currently being controlled by joystick 1, and joystick 2 has no effect. The adc_value1 and adc_value2 values read from the two joysticks via UART are identical.Please help me correctly read the value from each joystick so that each paddle is controlled properly.Thank you.

Hi everyone,I'm working on an STM32H7RS project (NUCLEO-H7S3L8) with the following setup:Bootloader in internal flash (0x08000000)Application in external OSPI flash (XIP) at 0x70000000Using Azure RTOS (ThreadX)Using TIM6 as the HAL time base (not SysTick)Configured using latest STM32CubeMX and STM32CubeIDE (v1.18.1)What I already checked:The vector table is correctly set in main() of the application:  int main(void) { /* USER CODE BEGIN 1 */ #define APPLICATION_VECTOR_TABLE ((uint32_t)0x70000000) SCB->VTOR = APPLICATION_VECTOR_TABLE; __DSB(); __ISB(); /* USER CODE END 1 */ /* Enable the CPU Cache */ /* Enable I-Cache---------------------------------------------------------*/ SCB_EnableICache(); /* Enable D-Cache---------------------------------------------------------*/ /* MCU Configuration--------------------------------------------------------*/ /* Update SystemCoreClock variable according to RCC registers values. */ SystemCoreClockUpdate(); /* Reset o

Hello,I'm currently working with I3C in Target mode using STM32H7S3L8. I need to detect when the Controller sends a request to read data from the Target.In I2C, we can check the Address Match (ADDR) flag to know when the master sends a frame to the slave.Is there a similar flag or event in I3C to detect when the Controller is requesting data from the Target (i.e., a read request)?I'm using the I3C HAL/LL drivers, and I want to handle this case to prepare and send the correct response.Thanks in advance!

I have a stm32g071gbu6 , that is linked to an I2S amplifier TAS5722LPA5 (I2S_CK) -> BLCKPA15 (I2S_WS) -> LRCLKPB5 (I2S_MCLK) -> MCLKPB6 (I2S_SD) -> SDII use a divider bridge to pass my 3,3V stm32 output to a 1,8V which is the only voltage the TAS accept.I use a 10K and 12K ohm resistors to make my 1,8V.I had a problem to control all the I2S output but the BLCK one. To try the outputs, I disabled the I2S and changed all the pin to normal Output. I was still not able to have any control of the outputs.So I unsoldered resistor R28 on my MCLK output, and R32 on WS to be sure it didn't had any influence.I'm still not able to have 3,3V on my MCLK output, nor my SD and CS.As I saw a patern that the non working outputs were only on the same side of the MCU, I tried 3 of the 4 other pins from this side, I tried the UART one, it appear that the PB3 does not work either, but PB6 and PB7 seems to work.All the other pin that I could try seems to work fine.I tried a new project, and I tr

Hi, I'm trying to configure the internal RTC on the STM32H753ZIT6 development board, but the RTC isn't functioning correctly—the time doesn't increment. The code was previously working with Ethernet, and I attempted to configure the internal RTC to work simultaneously. However, after making these changes, neither the RTC nor the Ethernet functions are working. I’ve attached the code and output file for reference.

I used the NUCLEO-G474RE (NUG474RE$AT1) board to test the X-CUBE-EEPROM library. I did not notice that the STM32G474RBT3 had been soldered instead of STM32G474RETx. It appears it has been soldered to the PCB originally since there are no signs of PCB rework / IC replacement and we have never used this chip version in our company. Anyhow, while testing using the aforementioned processor, I encountered the following problems.I wrongly assumed first that the STM32G474RBT3 had 512 kB of Flash when it actually has only 128 kB. I set START_PAGE_ADDRESS to 0x0807C000, which is before the end of the 512 KB Flash. I encountered an issue with the PAGE(__ADDRESS__) macro. When the page address is too large, meaning it falls outside the Flash area, the current implementation truncates the value so that it falls within the area. However, it would make more sense to report an error.After I realized that my "test device" has only 128 kB of Flash, I changed the emulated EEPROM START_PAGE_ADDRESS to 0x

Hi, i'm working on connecting a multimeter to an stm32f2 via USB (STM32 as a HOST). The goal is to send SCPI commands to it (I easly did it in python just to chek the correct behevor of the multimeter).I implemented the USB Host lib but after few hours of debugging i cant figure out how to set the active class... (phost->pActiveClass != NULL) return false and i get "No registered class for this device". I have setup CDC in cubeMX but doesn't seems to work).I use the USBH_CDC_Transmit to send command to the multimeter but since the USBH_UserProcess state machine never reach APPLICATION_READY state it's not even a thing (i tryed sending commands in APPLICATION_START state but no success either).I get the folowing output with max lvl of debug :USB Device ConnectedUSB Device Reset CompletedPID: ea60hVID: 10c4hAddress (#1) assigned.Manufacturer : Silicon LabsProduct : METRIX MX5060Serial Number : 10003926Enumeration done.This device has only 1 configuration.Default configu

Hi, I'm using STM32G47 MCU. I'm facing problem in my system, where I have to read data from two SPI_ADC's, one after one. Both are connected in a same SPI bus, with each have separate CS pin connected to MCU. The problem is that, I want to do everything using only by DMA. No cpu intervention or no isr should be used. The steps to be done are, 1. make CS1 low, CS2 high.2. Start reading ADC1 ic, using spi_dma.3. once the read completed, make the CS1 high, and CS2 low.4. Now start reading the ADC2 ic. and repeat the process. Here the above steps should happen continuously without any software processing. The data has to be updated in the background in the buffer. The dma has to be chained in such a way that, it happens in a sequence above. I have checked some posts, they suggesting to do using timers, but i don't think it's reliable. So, kindly provide me the best suitable solution available. Thanks in advance. 

Hello, I am using the STM32F429I-Disc1 development board and am trying to communicate with the external adc "ADS131M06". In order to do so, it requires full duplex  spi communication with 24 bit words. Our board does not have 24 bit words so instead I am using 8 bit words with DMA communication for minimal if not 0 delay between words. To test that I can properly communicate with the chip, I have set it up with CPOL=LOW, and CPHA=2 edge. I then send 0x00, 0x11, 0x00, (repeat 0x00 21 times). This is because a full communication frame includes an instruction, followed by data, followed by 6 received frames. When I send the reset command the response from the device is correct but in my memory I receive 0xFE27. Does anyone know what could cause the last bit of each word to be off? I noticed it is also random so sometimes it is correct. The device says it reads on a rising edge and writes on a falling edge, and here DIN transitions at the same edge as DOUT so maybe its that, but

I have 3 potentiometers, one on each channel of the ADC, that vary 3V. The ADC reads the values and converts to voltage.I have not been able by reading the datasheet and looking at some examples online to figure out how to get it to work using interrupts (with DMA it works).I attach the entire project, can you kindly check it? Thanks!

hello, When configuring the STM2H7 LTDC display controller in CLUT mode, the CLUTWR register needs to be write. In the official example provided by STM32, the register is cycled 256 times to configure the CLUT table. This method of writing 256 times to a register in a loop is different from common sense. How should we understand this configuration method? or who can give me some other example as this config method, thanks! for (counter = 0U; (counter < CLUTSize); counter++) { if (hltdc->LayerCfg[LayerIdx].PixelFormat == LTDC_PIXEL_FORMAT_AL44) { tmp = (((counter + (16U * counter)) << 24U) | ((uint32_t)(*pcolorlut) & 0xFFU) | \ ((uint32_t)(*pcolorlut) & 0xFF00U) | ((uint32_t)(*pcolorlut) & 0xFF0000U)); } else { tmp = ((counter << 24U) | ((uint32_t)(*pcolorlut) & 0xFFU) | \ ((uint32_t)(*pcolorlut) & 0xFF00U) | ((uint32_t)(*pcolorlut) & 0xFF0000U)); } pcolorlut++; /* Specifies the C-LUT address and RGB value */ LTDC_LAYE

Hi there,I'm trying to describe the problems I'm facing with configuring dual direct OctoSPI chips on a custom board based on the STM32H7R7I8T.The setup includes:ISSI IS66WVO32M8DBLL PSRAM connected to XSPI Port 1.Macronix MX25UW25645GXDI00 NOR Flash connected to XSPI Port 2, configured in XIP mode via EXTMEM_MANAGER, which works fine during boot.“Try” is the key word here — because there are many issues.The PSRAM works fine on its own using a custom driver based on HAL — I'm able to configure it, read its ID, and enter memory-mapped mode. The problems arise when I try to use both memories together (e.g., in a basic TouchGFX setup with assets in Flash and the framebuffer in PSRAM).When both memories are initialized in the Boot context, everything works fine (no hard faults, I'm able to jump to Application). However, to use the custom PSRAM driver, I also need access to the hxspi1 handle in the Application context (or so I think — feel free to correct me). I’ve tried entering memory-map

Hi all,I'm facing an issue while building my STM32 project in Release mode, but everything compiles fine in Debug mode.The following error appears during the Release build:Middlewares/usbx/UX_Network_Driver/subdir.mk:19: *** unterminated variable reference. Stop.make: *** [makefile:85: all] Error 2There are no issues in any of the other source or header files. This only occurs in the subdir.mk under the USBX network driver middleware.I would like to understand:What could be the root cause of this error?Why it occurs only in Release mode and not in Debug mode?What steps can I take to resolve this?Any guidance or suggestions would be greatly appreciated.Thanks in advance!

I have an issue to understand the MCU blocks for JPEG encoder. I have an stm32h743 MCU which is connected to a video decoder with dcmi interface. In ram I have the captured 8-bit ITU-R BT.656 YCrCb 4:2:2 output. Saving the captured data from ram to a debug file, I can see the image is captured properly. The byte stream looks like: Cb0-1, Y0,Cr0-1, Y1, Cb2-3, Y2, CR2-3, Y3 .... total 720Y and 360CB and 360 CR, total 1440 bytes + 8 byte blanking per line. And I have 240 lines so the resolution that I am capturing is 720x240.As described in the AN4996, each 4:2:2 MCU contains 256 bytes organized as two 8×8 Y blocks plus one 8×8 Cb block plus one 8×8 Cr block. For a 720×240 image, I should need 45 horizontal MCUs × 30 vertical MCUs = 1,350 total MCUs. My confusion is the two Y blocks. I implemented the two Y blocks as:Y1 first row:y0, y1 ... y7Y1 second row:y16, y17...y23Y2 first row:y8, y9, ... y15Y2 second row:y24, y25 .. y31Is this correct?So Y1 contains the first 8 pixel columns,

We are using your development board for the Testing our Control Logics and Communication from our Server. We are facing issue in the Ethernet Configuration and need support and details Steps.

My colleagues reported problems with data loss when using the X-CUBE-EEPROM library with STM32G473RET6 processors. The data loss occurred after a long period of using or testing embedded systems (switching them off and on quite frequently). I decided to investigate further. Ultimately, I discovered that the primary error was on our end: most of the virtual addresses used in the firmware exceeded NB_OF_VARIABLES. I investigated further because I initially suspected that the recovery process after a power failure while writing to or erasing a FLASH page was inadequate. While testing, reading the documentation, and reviewing the code, I discovered a missing boundary check and few other issues.The inadequate boundary check is in the EEPROM library. The "eeprom_emul_conf.h" configuration file contains a line#define NB_OF_VARIABLES xxx /*!< Number of variables to handle in eeprom */My colleagues misunderstood the purpose of NB_OF_VARIABLES. They thought it indirectly defines how many Flas

The only other mention i have found of this is in the following posthttps://community.st.com/t5/stm32-mcus-products/usb-otg-dual-role-selection-from-cube-mx/td-p/569876I'm using an F4 with external PHY.Everything works fine when configuring the USB FS as exclusively device or host but i'm unable to configure CubeMX to use both.What is the solution to this issue?Do i have to manually copy the host/device implementations and make a frankenstein implementation?The end goal is to have a USB Device VCP, a USB MSC and switch between them depending on the need.I dont really need the OTG part since the switching part is handled separately outside of the CubeMX code. Any input is appreciated.

I am using STM32F407VE Black Board. It contains the STM32F407VET6 chip. It has a microSD slot but the slot's CD pin is not connected. Due to this f_mount() is always returning faults. I don't know if this hardware miss connection is the primary problem why f_mount() returns faults or there are more problems. Please help me out with this. I am stuck since 2-3 days. I tried modifying the dist_status and dist_initialize functions to bypass this hardware check but when I upload the code, the board does nothing for 20-30sec and f_mount again returns error. I have attached my code changesDSTATUS disk_status ( BYTE pdrv /* Physical drive number to identify the drive */ ) { // DSTATUS stat; // // stat = disk.drv[pdrv]->disk_status(disk.lun[pdrv]); // return stat; return 0x04; } // Inside diskio.h: /* Disk Status Bits (DSTATUS) */ #define STA_NOINIT 0x01 /* Drive not initialized */ #define STA_NODISK 0x02 /* No medium in the drive */ #define STA_PROTECT 0x04 /* Write protected */0x04

 Hello ST Community,I'm working with the STM32G0B1CCT6 microcontroller and implementing a custom bootloader located at the beginning of flash memory. The bootloader handles firmware updates over FDCAN.:wrench:Flash Layout:Bootloader start address: 0x08000000Application start address: 0x08008000Total flash: 256 KBFlash page size: 2 KBIn my bootloader code, I handle a specific FDCAN message with ID 0x555 as a signal to erase the entire application area (from 0x08008000 to 0x080FFFFF).:white_heavy_check_mark:What works:The bootloader receives the erase command correctly from FDCAN.It calls HAL_FLASHEx_Erase() and returns HAL_OK.The UART debug log confirms the erase was “successful”.:cross_mark:The problem:After erasing, when I read back the flash content at address 0x08008000, I still see the previous application data (e.g., 0x20024000, 0x08008859, etc.), not 0xFFFFFFFF as expected.:magnifying_glass_tilted_left:Debug output example: bash ERASE command received! Flash Erased

Hi all!I am developing a midi pedal using the USB functionalities of the STM32F411. I want to use a software toggle to switch between Host and Device. I am having this issue: I can't use OTJ Dual mode because it uses pin PA10, which I use for the UART (I actually only use sending for this UART, but for some reason, both pins are reserved anyway). I can toggle between Device_Only and Host_Only within STM32CubeIDE. How can I achieve that on the go in software? I don't mind if the device needs restarting in between. Any help will be greatly appreciated!

Hi everyone,I’m working with a custom board that uses the STM32H733VGT and the LAN8742AI Ethernet PHY. I’ve configured the MPU and middleware following the ST example for the STM32H75_DISCO board. The board responds to ping in release mode and after a watchdog reset in debug mode—but it fails to respond on the first run after flashing or power-up.Please find attached my .ioc and ETH Init function file in the attachments. Any comment or advice would be highly appreciated.Tnx,Amir 

Hi all,I’m trying to use the external NOR flash (MX66UW1G45G) on the STM32U5G9J-DK2 board as the storage backend for a FAT filesystem using FileX.I came across the example “Fx_NoR_Write_Read_File” from STM32CubeIDE (STM32U5G9J-DK2 package), which appears to be doing exactly this — creating a FAT filesystem using FileX and LevelX on the external NOR via XSPI. However, it’s .ioc file is missing, so I can’t see how the XSPI interface and pins are configured.I built and flashed the example as-is, but the fx_media_format() call returns FX_IO_ERROR (0x90 in Hex and 144 in decimal). Could someone please guide me on the correct steps to:How to properly configure XSPI for the MX66UW1G45G in CubeIDE.The correct steps to use FileX and LevelX with external NOR flash as the filesystem backend.Thanks in advance!

Hello,  I am using the STMH753ZI chip on the nucleo 144 board. I cannot figure out why my UART code will not show what I am typing in my putty terminal. Attached is my main.c. Thanks. /* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2025 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "uart.h" /* Private includes --------------------

Post edited to follow the community rules: Please review how to share a code in this post.Using the stm32g030k8 and the Version: 1.18.1 STM32CubeIDE I just recently applied an optimization in order to get more space for my application firmware. And then I realize that the HAL_ADC_ConvCpltCallback has been optimized away. I use the -Og (debug optimization) to use the less agressive and more debug friendly optimization.   __attribute__((used)) void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc1) { ADC_Average_Buff[CHANNEL_VREF] = ADC_DMA_Buff[CHANNEL_VREF]; ADC_Average_Buff[CHANNEL_VBAT] = ADC_DMA_Buff[CHANNEL_VBAT]; ADC_Average_Buff[CHANNEL_CURRENT] = ADC_DMA_Buff[CHANNEL_CURRENT]; ADC_Average_Buff[CHANNEL_TEMPERATURE] = ADC_DMA_Buff[CHANNEL_TEMPERATURE]; ADC_Average_Buff[CHANNEL_VREF] += ADC_DMA_Buff[CHANNEL_VREF]; ADC_Average_Buff[CHANNEL_VBAT] += ADC_DMA_Buff[CHANNEL_VBAT]; ADC_Average_Buff[CHANNEL_CURRENT] += ADC_DMA_Buff[CHANNEL_CURRENT];